I am trying to use the MAC-NET core in the Vybrid uC in a TWR-VF65GS10 board (connected to a TWR-SER2 board). And I believe I have done everything that should be done to be able to send a random ethernet frame:
If I understand correctly, now DMA should take over and either send the frame or signal any error, and then set TDAR to 0.
But nothing is happening. TDAR stays ==1 indefinitely. No changes in EIR either. And Wireshark also doesn't see anything.
I have tried using enhanced buffers and requested interrupt flags to see if any error flags appeared on their status fields. Nothing.
I have tried checking what the BSP does, and I don't see anything I could be missing.
I have tried different alignment sizes, either the minimum required ones or much bigger than recommended.
I have tried ungating all the CCGR clocks just in case I was missing something..., setting the MII_SPEED in MSCR slower than necessary..., tried different sizes of ethernet frames, ... nothing happens.
U-boot in the accelerometer demo boot disk does manage to ping the network, so the hardware is functional.
The RAM I am using is set to be non-cached.
Does anyone have any idea of what could be wrong?
Solved! Go to Solution.
Just in case someone finds him/herself in this situation, my problem was that the MMU had been activated and I was passing virtual addresses to the MAC-NET. The moment I passed the physical addresses it started working.
A colleague says the Vybrid USB controller did something similar because of alignment problems, so in general, looks like the module-private DMA engines have this tendency to just sit there if there is any problem with their work parameters. For the MAC-NET case, I expected at the very least that the EIR[EBERR] bit would flag a problem with the DMA transaction (as its description says), but... no.
Just in case someone finds him/herself in this situation, my problem was that the MMU had been activated and I was passing virtual addresses to the MAC-NET. The moment I passed the physical addresses it started working.
A colleague says the Vybrid USB controller did something similar because of alignment problems, so in general, looks like the module-private DMA engines have this tendency to just sit there if there is any problem with their work parameters. For the MAC-NET case, I expected at the very least that the EIR[EBERR] bit would flag a problem with the DMA transaction (as its description says), but... no.
timesyssupport can you attend this case?