T2081 SerDes1_PLLx not locking

[ioxos]

Hello,

The SerDes1_PLL1 and SerDes1_PLL2 are not locking on our T2081 board.

We have selected SRDS_PRTCL_S1 = 0xAA

We supply the 100MHz clock differential to SD1_REF_CLK1 and SD1_REF_CLK2

with clean clock. (no jitter)

We have UBOOT up and running, so we are able to Read/Write PLLnRSTCTL registers and

we have following values :

SerDes1_PLL1RSTCTL = 0x264745A7

SerDes1_PLL2RSTCTL = 0x06474520

Find attached our RCW image used.

Best regards

Joel Bovier

Original Attachment has been moved to: ifc1211_rcw_aa_1200MHz.bin.zip

[ufedor]

The SRDS_PRTCL_S2 value is 0 which is illegal.

If the SerDes2 is not used it is required to refer to the QorIQ T2080 Reference Manual, 19.1.1.1.3 Rules for disabling a SerDes module.

Also please ensure that SerDes1 reference clocks are stable when PORESET is deasserted.

[ioxos]

OK, I will set in RCW the SerDEs2 disabling option as recommended in 19.1.1.1.3

One more question

If I select SRDS_PRTCL_S1 = 0xAA, shall I set SRDS_PRTCL_S2 to 0x02 or 0x1F ?

[ufedor]

If the SerDes2 is not used set SRDS_PRTCL_S2 to 0x02