T1042 NOR Boot

[mdursun]

Hello,

I am trying to boot from NOR FLASH for T1042 processor. Swicthes are set to boot from NOR-FLASH.

I have written the images to the following addresses of NOR flash.

• 0xE8000000 - PBL.bin ( Generated by QCVS)
• 0xEFF00000 - FMAN ucode.bin
• 0xEFF40000 - u-boot-nor-2016.09+fslgit-r0.bin

Initial stage of the boot is being successful, it means that RCW is read from the NOR-flash. However nothing happens after it.

T1042 has a 256kB CPC (that can be configured as SRAM). Since u-boot-nor-2016.09+fslgit-r0.bin is 768kB, I assume that there would be a Secondary Program Loader (SPL).

At first stage an SPL shall be loaded to the CPC from NOR-FLASH. Then SPL,

• shall initialize the DDR,
• shall copy U-BOOT.bin from NOR-FLASH to the DDR,
• shall jump to the U-BOOT code.

However I couldn't find any SPL binary in QORIQ SDK directories. Where can I find this binary file?

Best Regards,

Mustafa

[yipingwang]

u-boot-nor-2016.09+fslgit-r0.bin is 768kB, that is the correct size of whole NOR flash u-boot image.

There is no SPL for NOR FLASH u-boot, u-boot boots directly from NOR flash then initializes DDR and copies u-boot image to DDR and jump executing from DDR.

u-boot provided in QorIQ SDK 2.0 is used for T1042RDB demo board, you need to modify u-boot source code according to your custom board.

DDR controller initialization section provided in SDK 2.0 u-boot for T1042RDB is not suitable for your custom board, you need to modify u-boot source code board/freescale/t104xrdb/ddr.h according to your custom board.

You could refer to this document

https://community.nxp.com/t5/Qonverge-Knowledge-Base/DDR-Controller-Configuration-on-LS2085-LS2080-B...

[mdursun]

Hi @yipingwang ,

Thanks for the clarification of the SPL issue for NOR-FLASH boot.

Previously, I have changed the DDR.h file according to our custom board DDR and successfully boot u-boot from SDCARD with those settings. I am using same DDR.h file for u-boot-nor-2016.09+fslgit-r0.bin but it stucks.

Following is the list of the files that I have changed to make source codes copliant with our custom-board.

• T1042D4RDB_defconfig /git/configs
• t1042d4_sd_rcw.cfg /git/board/freescale/t104xrdb
• t104x_pbi.cfg /git/board/freescale/t104xrdb
• law.c /git/board/freescale/t104xrdb
• ddr.c /git/board/freescale/t104xrdb
• ddr.h /git/board/freescale/t104xrdb
• fsl_esdhc_spl.c /git/drivers/mmc

Can there be a setting that effects NOR-boot in above files?

Is there any other required modification on source codes for NOR-boot?

Best Regards,

Mustafa

[yipingwang]

If you use different IFC NOR flash on your custom board from T1042RDB, you need to modify NOR flash IFC timing configuration section in u-boot.

You need to modify the following section in u-boot source code include/configs/T104xRDB.h.

/* NOR Flash Timing Params */
#define CONFIG_SYS_NOR_CSOR CSOR_NAND_TRHZ_80
#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \
FTIM0_NOR_TEADC(0x5) | \
FTIM0_NOR_TEAHC(0x5))
#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \
FTIM1_NOR_TRAD_NOR(0x1A) |\
FTIM1_NOR_TSEQRAD_NOR(0x13))
#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \
FTIM2_NOR_TCH(0x4) | \
FTIM2_NOR_TWPH(0x0E) | \
FTIM2_NOR_TWP(0x1c))
#define CONFIG_SYS_NOR_FTIM3 0x0

#define CONFIG_SYS_FLASH_QUIET_TEST
#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */

#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */
#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */

#define CONFIG_SYS_FLASH_EMPTY_INFO
#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS}

You could refer to https://community.nxp.com/t5/Layerscape-Knowledge-Base/IFC-Controller-Configuration-on-QorIQ-Custom-...

[mdursun]

Hi @yipingwang,

Yes we have used different IFC NOR flash on our custom board from T1042RDB.

Before trying to boot from NOR-FLASH, as I previosuly said, I have successfully boot from SDCARD. After this, I have tested and verified that all of the other peripherals on the board, i.e. NAND-flash, PCIe, Ethernet, and NOR-FLASH were working properly.

At that verification step, I had changed the settings(/* NOR Flash Timing Params */) in *include/configs/T104xRDB.h* in order to access NOR-FLASH. (Mostly non-timing related parameters, data width, bank count etc...) Nevertheless, I have executed a full write/read test on IFC-NOR flash, and it was successful. I should also mention that I am writing RCW, FMAN microcode and U-BOOT.bin to the NOR-FLASH by using u-boot commands. (erase, cp.b etc...)

Briefly, I can access IFC NOR-FLASH when I boot from SDCARD, but although same settings are used in u-boot-nor-2016.09+fslgit-r0.bin, it fails to boot from NOR-flash.

I will check the timing parameters to be sure. But does the situation I described above make sense?

Best Regards,

Mustafa

[mdursun]

Hi @yipingwang ,

The problem is solved in two steps.

1. Since I was assuming that DDR will be used in NOR-flash, BOOT_LOC was selected as Memory Complex1, in my RCW settings. I changed it to be IFC but this alone did not solve the problem.
2. Just to try it out, I deleted all the PBI commands added to the end of the RCW. Then it boot from NOR-flash.

Best Regards,

Mustafa