T1042 NOR Boot on Custom-Board

[mdursun]

Hello,

We have a custom board in which T1042 processor exists. Previosly I have been able to boot it up from SDCARD by modifiying u-boot source codes of T1042D4DRB QORIQ SDK Project.

Now, I am trying to boot it from NOR flash but I couldn't succeed. 

I have written the images to the following addresses of NOR flash.

0xE8000000 - PBL.bin ( Generated by QVCS)

0xEFF00000 - FMAN ucode.bin

0xEFF40000 - u-boot-nor-2016.09+fslgit-r0.bin

The processor is reading RCW from the NOR FLASH. I understood it by checking the power consumption of the board, also I saw that SDCARD clock pin was starting toggle. However I am stucked at this stage. There is not any serial port prints... While searching the web, I saw that there is an erratum about NOR-BOOT. (Errata A-003399) 

I think that the solution can be about applying this errata. How can I find detailed information about this errata. It is sait that erratum A003399 is explained in Freescale App Note 4493 but I couldn't find this document, is it still avialable?

I guess that I have to add PBI commands to the end of the RCW file. Is there any available solution for this issue?

Best Regards,

Mustafa

[Chavira]

Thank you for contacting NXP support!

In your custom board do you have switches to change the boot mode?

The T1042RDB has some switches to change the boot mode in different sources.

if is possible please send me your schematic to review it.

if you can't publish your schematic, please open a new case following the link.

Support | NXP Semiconductors

we have the documents that you mention in your post but, I can't publish those files in the community, we only share these documents under NDA.

[mdursun]

Hi Chavira,

Yes we have switches on the board and they are set as below.

cfg_rcw_src[0]_[1:4] _[5:8] = 0_0010_0111 (16-bit NOR flash)

cfg_eng_use[0:2] = 000

There is not a CPLD in our board, hence some of the switch signals are not used in our design. Are the above signals enough for NOR-boot?

In sdcard boot, there is an SPL code which is first loaded to CPC and SPL initializes the DDR, and load u-boot from sdcard to the DDR and finally execute it. Is it the same procedure for nor-boot?

Note: Yes, it is not possible for me to share schematic as public. If above information is not enough we can continue on case-support.

Best Regards,

Mustafa

[Chavira]

Please open a new case on our page to review your schematics and understand better the situation of your design and we can provide a solution as soon as possible.

Best regards.
Chavira

[mdursun]

Hi @Chavira ,

I have opened a new case with number 00523633.

Best Regards,

Mustafa