MC33771 in 13/14/15/16 bit resolution

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MC33771 in 13/14/15/16 bit resolution

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inseop_lee
Contributor II

Hi,

I have a question on using MC33771 in different resolutions.

I am wondering, how do you get measured data?

Based on datasheet,  it seems MEAS_XXXX register is the register that have measured value.

MEAS_XXXX is 16 bit register and MSB is used for  DATA_RDY so only 15 bit is left for measured values.

Now for 13/14 bit resolution which portion of bits are for measured value out of 15 bit and for 16 bit resolution

how do you get 16 bit value from 15 bit format?

Thanks,

Inseop 

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7 Replies

3,166 Views
inseop_lee
Contributor II

Tomas,

Thanks again for your answer.

Regards,

Inseop

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3,166 Views
inseop_lee
Contributor II

Tomas,

Thanks for your quick answer. But I am still wondering how do you get 16 bit resolution out of 15 bit value.

Correct me if I am wrong,

for 13 bit resolution, MEAS_XXX looks like xxx_xxxx_xxxx_xx00 with two trailing '0'

for 14 bit resolution, MEAS_XXX looks like xxx_xxxx_xxxx_xxx0 with one trailing '0'

for 15 bit resolution, MEAS_XXX looks like xxx_xxxx_xxxx_xxxx

for 16 bit resolution, MEAS_XXX looks like xxx_xxxx_xxxx_xxxx

in this case I don't see the difference between 15 and 16 bit resolutions.

There must be something else that I am missing, please guide me so that I can understand your operation.

Regards,

Inseop

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3,166 Views
TomasVaverka
NXP TechSupport
NXP TechSupport

Hi Inseop,

The resolution is allowing to use part of complete structure of the 16-bits hybrid ADCs.

The impact of the resolution is mainly on the noise of the acquisition (see below for CTx – extracted from datasheet):

 pastedImage_4.png  

And also conversion time (see below for ADC1A/B – extracted from datasheet): 

 pastedImage_3.png

 

Effectively resolution of the results of acquisition is limited by the size of the respective MEAS_XXX register.

Notice that the accuracies of the acquisition are guaranteed in 16 bits acquisition mode.

Best regards,

Tomas

3,166 Views
TomasVaverka
NXP TechSupport
NXP TechSupport

Hi Inseop,

ADC1_A/B conversion values are independent of the selected resolution of ADC_CFG.

pastedImage_2.png

 

For ADC1 CT/ANx the formula is as follows:
V = MEAS_XXX[14..0] * VCT_ANx_RES

Pseudo-code (1 cell only):

ReadRegister(MEAS_CELL1)
rawVoltage = MEAS_CELL1 & 0x7FFF                      // remove DATA_RDY bit
voltage = rawVoltage * VCT_ANx_RES / 1000000    // calculate/scale voltage in V

Example:

With VCT_ANx_RES μV/LSB and MEAS_CELL1[15..0] = 0xDECD
then MEAS_CELL1[14..0] = 0x5ECD = 24269
then V = 24269 * 152.58789 = 3703155 μV = 3.703155 V

Best regards,

Tomas

2,617 Views
jbirchy
Contributor IV

How does your calculation correlate with a 16-bit ADC resolution?

4.85V / 2^16 = 74uV, whereas you are using 152uV which corresponds to a 15-bit value.

How can you state that the MC3377x has 16-bit ADC resolution? 

Am I missing something or is marketing trying to pull the wool over our eyes?

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2,523 Views
peter_pinewski
NXP Employee
NXP Employee

Hi @jbirchy,

A couple of notes on this question/comment.  I realize this can be a bit confusing and can be debated.

The ADCs are indeed 16-bit ADCs.  However, since we utilize a DATA_RDY bit in the result registers, we only have 15-bits remainng for the ADC result.  Therefore, the ADC value is shifted into these remaining 15-bits.  This maintains the 15 most significant bits of the 16-bit ADC resulting in the specs that you highlighted.  Note that having a 16-bit ADC result which is shifted improves noise margin on the ADC vs having a strictly 15-bit ADC.

Also note that we only gaurantee the accuracy of  the ADC when setting the ADCx_DEF = 11 (16-bit).  This is outlined in the notes of the datasheet.  

From the MC33771B datasheet, we have the following note in the electricals section.

[5] The cell voltage error includes all internal errors, for example; ADC offset, gain error, INL and DNL. Current measurement is not active when measuring the cell voltage. Single shot measurements are affected by noise, which has zero mean and standard deviation given by VV_NOISE and is not included in the cell voltage error. In order to reduce it, SW implemented IIR or FIR low pass filters may be used; example, a moving average, whose length is N samples, has output standard deviation VOUTPUT_NOISE = VV_NOISE /sqrt(N). Performance can be granted only if ADC1-A,B are configured at 16-bits resolution (ADC_CFG[ADC1_A_DEF] =ADC_CFG[ADC1_B_DEF] = 11) and if -100 mV ≤ CTREF - GND ≤ 100 mV.

I hope this answers your question.

Regards,
Peter

2,514 Views
jbirchy
Contributor IV

Thanks @peter_pinewski 

How does "having a 16-bit ADC result which is shifted improves noise margin on the ADC vs having a strictly 15-bit ADC"?

Are you assuming that the 16-bit ADC has a lower S/N ratio than a 15-bit ADC which results in a better ENOBs?

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