Hi,
the task:
Measurement of the positive and negative voltage of an external PWM signal with variable duty cycle.
The PWM signal is connected to the controller via PTA0/ADC0_SE0 and via PTB5/TRGMUX_IN0.
Frequency of the PWM signal: 1kHz (1ms period time)
Duty Cycle: 1% ... 99%
Approach:
Start ADC measurement via rising and falling edge at TRGMUX_IN0.
Problem:
ADC measurement cannot be started via TRGMUX_IN0. Found code examples and Refrence Manual are not helpful here.
Question:
How must ADC, PDB and TRGMUX be configured to start ADC measurement via rising and falling edge at TRGMUX_IN0.
Are there any corresponding code examples or pseudo code?
Alternative approaches:
- Trigger measurement via interrupt, triggered by PTB5 -> Too slow.
- Massive oversampling of the PWM signal (min. 100 measurements per period) -> Expensive, especially in the processing of the measured values.
I hope someone can help me.
Many thanks already.
BR, Sebastian
已解决! 转到解答。
Hi Sebastian,
If you trigger the ADC directly with TRGMUX_IN0, you need to use a SW pretrigger as it is explained in the RM,
The note below Figure 43-2. ADC0_PDB0 ADC Triggering scheme example.
If you would like to use the PBD module, I would recommend the S32K1xx motor control demos:
MCSPTE1AK144: S32K144 Development Kit for BLDC and PMSM motor control
AN12235 3-Phase Sensorless PMSM Motor Control Kit with S32K144
https://www.nxp.com/docs/en/application-note/AN12235.pdf
4.1.1. Module interconnection
Figure 11. S32K144 module interconnection
The demo uses a FTM trigger instead of TRGMUX_IN0 but it shows how to configure the PDB module.
Regards,
Daniel
Hi Sebastian,
If you trigger the ADC directly with TRGMUX_IN0, you need to use a SW pretrigger as it is explained in the RM,
The note below Figure 43-2. ADC0_PDB0 ADC Triggering scheme example.
If you would like to use the PBD module, I would recommend the S32K1xx motor control demos:
MCSPTE1AK144: S32K144 Development Kit for BLDC and PMSM motor control
AN12235 3-Phase Sensorless PMSM Motor Control Kit with S32K144
https://www.nxp.com/docs/en/application-note/AN12235.pdf
4.1.1. Module interconnection
Figure 11. S32K144 module interconnection
The demo uses a FTM trigger instead of TRGMUX_IN0 but it shows how to configure the PDB module.
Regards,
Daniel
Hello Daniel,
thanks to your answer I found a problem why the example(s) did not work for me. It is necessary to clean and rebuild the complete project after changing the settings via "Processor Expert" / "Component Inspector".
All in all, I was able to get the "ADC PAL" example working and adjust the necessary settings for my project.
One question is still open: is it possible to trigger the ADC conversion not only on a falling edge (that's what I have now), but additionally on a rising edge at TRGMUX_IN0?
Thanks a lot for your help!
Many greetings,
Sebastian
Hi Sebastian,
I'm suprised you can trigger the ADC with a falling edge.
Because as per the ADC specification, "when an ADHWT source is available and hardware trigger is enabled, that is SC2[ADTRG] = 1, a conversion is initiated on the rising edge of ADHWT." (44.5.3 Hardware trigger and channel selects)
There is no option to choose the active edge, I'm afraid.
Regards,
Daniel
Hi Daniel,
oh right, that's my mistake. The ADC signal is inverted to the TRGMUX signal. This means that the ADC sees a falling edge but is triggered by a rising edge at TRIGMUX_IN0. S Sorry for this.
So according to the specification the ADC measurement is actually triggered at a high signal. So if the hardware trigger is activated when the signal at TRIGMUX_IN0 is already high, then the measurement is started immediately and not at the next rising edge. Have I understood this correctly?
All in all, this means that I can only measure the second voltage component of the PWM via a time offset. Then I try it with this.
Thank you so much for your support, Daniel.
Many greetings,
Sebastian
Hi Sebastian,
Yes, that is correct.
If the trigger is already HIGH, the ADC module detects an rising edge on the trigger input and a conversion is started when the HW trigger gets enabled in the ADC module & the corresponding pretrigger for the channel is asserted.
Yes, for this use case you need to use the PDB module to delay the conversion.
BR, Daniel