S32K312 W/R FULL access MPU address leads to MemManage exception

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

S32K312 W/R FULL access MPU address leads to MemManage exception

Jump to solution
1,074 Views
Jason_1234
Contributor I

Hi,

As you may see, current MSP 0x20403088, LR(R14) = 0xFFFFFFF9;

Jason_1234_2-1702466672946.png

 

And the MSP address is in the Region 3 (0x204021E0 + 4k = 0x204031E0)

Jason_1234_0-1702466338917.png

But in my software, when "BX LR" executed and trying to return from exception handler, it will lead to MemManage exception.

According to BX and Exception entry behavior in cortex-m7, we may know software should restore size 0x20 data from MSP and go to 0x4de730 to execute.

Jason_1234_0-1702467316927.png

According to test, if I set the Region 3 size from 4k to 8k manually in debugger, then the software can go to the 0x4de730 successfully. So I think the MemManage exception is caused when BX executed and trying to pop data from stack, hardware considers that the address in stack is not accessible, but anyone can explain why MemManage exception happened in this case?

Note: we didn't configure any MPU regions for code flash sections, so no execution protection in our software.

Thank you!

Tags (1)
0 Kudos
Reply
1 Solution
1,000 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hi @Jason_1234,

Can you allign the base address of each region to the size of the selected region?

For a 4KB region, base address aligned to 0x1000

Arm®v7-M Architecture Reference Manual

danielmartynek_0-1702645912227.png

 

Thanks,

BR, Daniel

 

View solution in original post

0 Kudos
Reply
4 Replies
1,001 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hi @Jason_1234,

Can you allign the base address of each region to the size of the selected region?

For a 4KB region, base address aligned to 0x1000

Arm®v7-M Architecture Reference Manual

danielmartynek_0-1702645912227.png

 

Thanks,

BR, Daniel

 

0 Kudos
Reply
859 Views
Jason_1234
Contributor I

Hi @danielmartynek ,

Thank you for the support!

My issue solved.

Best Regards.

0 Kudos
Reply
1,014 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hi @Jason_1234,

What kind of MemManage execption is it?

Can you read the CFSR Register?

Is MMARVALID set?

 

Thanks,

BR, Daniel

0 Kudos
Reply
1,004 Views
Jason_1234
Contributor I

Hi @danielmartynek ,

The MMFSR.MUNSTKERR is set.

And we also has the other error, when executed this ldbr r1, [r2], the MemManage exception happen.

Jason_1234_0-1702637583824.png

[r2] = 0x2040C71C

Jason_1234_1-1702637625013.png

The MPU error as following: MMFSR = 0x82 (0x2040C71C no data access permission)

Jason_1234_1-1702638178457.png

But as you may see, the 0x2040C71C is in the region 15, and w/r access is fine.

Jason_1234_0-1702638126217.png

Thank you!

Best regards,

 

 

 

 

0 Kudos
Reply