Hi,all
IDE : S32 Design Studio for ARM Version 2018.R1. SDK :3.0.0
I use high-speed SPI with 10MHz, the clock waveform is abnormal.
1、when using SPI + Int with 10Mhz, PCS continuous
why is it a 4-byte cluster ? is it because of FIFO ?
The eighth bit clock was changed ,get lonnger or shorter,why?
1、when using SPI + DMA with 10Mhz, PCS continuous
Why is there a delay after the data is sent? and the -O1 optimize can delete the delay.
BRs,
xianlong
Solved! Go to Solution.
Hi @wuxianlong,
In the interrupt mode, there is a significant process overhead and the driver is not able to write the FIFO in time.
According to the release notes of the SDK, it has been tested at -O1 only.
We can't guarantee its functionality at different optimization levels.
What is the functional clock of the LPSPI module?
Is it really 80MHz?
It must be less or equal to the BUS_CLK.
Regards,
Daniel
Hi @wuxianlong,
In the interrupt mode, there is a significant process overhead and the driver is not able to write the FIFO in time.
According to the release notes of the SDK, it has been tested at -O1 only.
We can't guarantee its functionality at different optimization levels.
What is the functional clock of the LPSPI module?
Is it really 80MHz?
It must be less or equal to the BUS_CLK.
Regards,
Daniel
Hi, @danielmartynek
Thank you for your help.I was very confused that the eighth bit clock was delayed for a long time and I was using the second edge.
Regards,
xianlong
My configuration,and test Code
BRs,