S32K- Failed to connect - JLink log :Could not measure total IR len. TDO is constant high.

[Toneon5]

Target: S32K148

Debug tool: Jlink ultra+

JTAG Interface hardware: JTAG_TMS, TDI, TDO pullup to 5v via 10k resistor, JTAG_CLK pulldown to ground via 10k resistor

I used J-Flash to conect the target, and set debug type as JTAG mode, but connection was failled, J-Flash log was below：

Connecting ...
- Connecting via USB to probe/ programmer device 0
- Probe/ Programmer firmware: J-Link Ultra V6 compiled Mar 6 2023 18:09:24
- Probe/ Programmer S/N: 506000629
- Device "S32K148" selected.
- Target interface speed: 4000 kHz (Fixed)
- VTarget = 4.928V
- InitTarget() start
- JTAG selected. Identifying JTAG Chain...
- Could not measure total IR len. TDO is constant high.
- Error: Scanning JTAG chain failed.
- Connect Under Reset
- JTAG selected. Identifying JTAG Chain...
- Could not measure total IR len. TDO is constant high.
- Error: Scanning JTAG chain failed.
- Communication error while accessing MDM-AP.
- Connect Under Reset
- InitTarget() end - Took 220ms
- Connect failed. Resetting via Reset pin and trying again.
- InitTarget() start
- JTAG selected. Identifying JTAG Chain...
- Could not measure total IR len. TDO is constant high.
- Error: Scanning JTAG chain failed.
- Connect Under Reset
- JTAG selected. Identifying JTAG Chain...
- Could not measure total IR len. TDO is constant high.
- Error: Scanning JTAG chain failed.
- Communication error while accessing MDM-AP.
- Connect Under Reset
- InitTarget() end - Took 221ms
- ERROR: Failed to connect.
Could not establish a connection to target.

Then I set debug type as SWD，the log was:

Connecting ...
- Connecting via USB to probe/ programmer device 0
- Probe/ Programmer firmware: J-Link Ultra V6 compiled Mar 6 2023 18:09:24
- Probe/ Programmer S/N: 506000629
- Device "S32K148" selected.
- Target interface speed: 4000 kHz (Fixed)
- VTarget = 4.924V
- InitTarget() start
- SWD selected. Executing JTAG -> SWD switching sequence.
- Connect Under Reset
- SWD selected. Executing JTAG -> SWD switching sequence.
- Communication error while accessing MDM-AP.
- Connect Under Reset
- InitTarget() end - Took 409ms
- InitTarget() start
- SWD selected. Executing JTAG -> SWD switching sequence.
- Connect Under Reset
- SWD selected. Executing JTAG -> SWD switching sequence.
- Communication error while accessing MDM-AP.
- Connect Under Reset
- InitTarget() end - Took 408ms
- ERROR: Failed to connect.
Could not establish a connection to target.

I checked the wires of jlink(TDI, TDO, TMS, CLK, RST), all of them was ok.

Any suggestions about this error?

[Toneon5]

I kept reset pin connected to ground, the log of J-Flash was:

Connecting ...
- Connecting via USB to probe/ programmer device 0
- Probe/ Programmer firmware: J-Link Ultra V6 compiled Mar 6 2023 18:09:24
- Probe/ Programmer S/N: 506000629
- Device "S32K148" selected.
- Target interface speed: 100 kHz (Fixed)
- VTarget = 4.926V
- InitTarget() start
- SWD selected. Executing JTAG -> SWD switching sequence.
- Timeout while halting CPU.
- InitTarget() end - Took 374ms
- Found SW-DP with ID 0x2BA01477
- DPIDR: 0x2BA01477
- CoreSight SoC-400 or earlier
- Scanning AP map to find all available APs
- AP[2]: Stopped AP scan as end of AP map has been reached
- AP[0]: AHB-AP (IDR: 0x24770011)
- AP[1]: JTAG-AP (IDR: 0x001C0000)
- Iterating through AP map to find AHB-AP to use
- AP[0]: Core found
- AP[0]: AHB-AP ROM base: 0xE00FF000
- CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
- Found Cortex-M4 r0p1, Little endian.
- FPUnit: 6 code (BP) slots and 2 literal slots
- CoreSight components:
- ROMTbl[0] @ E00FF000
- [0][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
- [0][1]: E0001000 CID B105E00D PID 003BB002 DWT
- [0][2]: E0002000 CID B105E00D PID 002BB003 FPB
- [0][3]: E0000000 CID B105E00D PID 003BB001 ITM
- [0][4]: E0040000 CID B105900D PID 000BB9A1 TPIU
- [0][5]: E0041000 CID B105900D PID 000BB925 ETM
- Initializing 258048 bytes work RAM @ 0x1FFE0000
- Reset: Halt core after reset via DEMCR.VC_CORERESET.
- Reset: Reset device via AIRCR.SYSRESETREQ.
- Reset: S_RESET_ST never gets cleared. CPU seems to be kept in reset forever.
- Reset: Using fallback: Reset pin.
- Reset: Halt core after reset via DEMCR.VC_CORERESET.
- Reset: Reset device via reset pin
- Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
- Reset: Reconnecting and manually halting CPU.
- Found SW-DP with ID 0x2BA01477
- DPIDR: 0x2BA01477
- CoreSight SoC-400 or earlier
- AP map detection skipped. Manually configured AP map found.
- AP[0]: AHB-AP (IDR: Not set)
- AP[0]: Core found
- AP[0]: AHB-AP ROM base: 0xE00FF000
- CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
- Found Cortex-M4 r0p1, Little endian.
- CPU could not be halted
- Reset: Core did not halt after reset, trying to disable WDT.
- Reset: Halt core after reset via DEMCR.VC_CORERESET.
- Reset: Reset device via reset pin
- Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
- Reset: Reconnecting and manually halting CPU.
- Found SW-DP with ID 0x2BA01477
- DPIDR: 0x2BA01477
- CoreSight SoC-400 or earlier
- AP map detection skipped. Manually configured AP map found.
- AP[0]: AHB-AP (IDR: Not set)
- AP[0]: Core found
- AP[0]: AHB-AP ROM base: 0xE00FF000
- CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
- Found Cortex-M4 r0p1, Little endian.
- CPU could not be halted
- Reset: Failed. Toggling reset pin and trying reset strategy again.
- Found SW-DP with ID 0x2BA01477
- DPIDR: 0x2BA01477
- CoreSight SoC-400 or earlier
- AP map detection skipped. Manually configured AP map found.
- AP[0]: AHB-AP (IDR: Not set)
- AP[0]: Core found
- AP[0]: AHB-AP ROM base: 0xE00FF000
- CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
- Found Cortex-M4 r0p1, Little endian.
- Reset: Halt core after reset via DEMCR.VC_CORERESET.
- Reset: Reset device via AIRCR.SYSRESETREQ.
- Reset: S_RESET_ST never gets cleared. CPU seems to be kept in reset forever.
- Reset: Using fallback: Reset pin.
- Reset: Halt core after reset via DEMCR.VC_CORERESET.
- Reset: Reset device via reset pin
- Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
- Reset: Reconnecting and manually halting CPU.
- Found SW-DP with ID 0x2BA01477
- DPIDR: 0x2BA01477
- CoreSight SoC-400 or earlier
- AP map detection skipped. Manually configured AP map found.
- AP[0]: AHB-AP (IDR: Not set)
- AP[0]: Core found
- AP[0]: AHB-AP ROM base: 0xE00FF000
- CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
- Found Cortex-M4 r0p1, Little endian.
- CPU could not be halted
- Reset: Core did not halt after reset, trying to disable WDT.
- Reset: Halt core after reset via DEMCR.VC_CORERESET.
- Reset: Reset device via reset pin
- Reset: VC_CORERESET did not halt CPU. (Debug logic also reset by reset pin?).
- Reset: Reconnecting and manually halting CPU.
- Found SW-DP with ID 0x2BA01477
- DPIDR: 0x2BA01477
- CoreSight SoC-400 or earlier
- AP map detection skipped. Manually configured AP map found.
- AP[0]: AHB-AP (IDR: Not set)
- AP[0]: Core found
- AP[0]: AHB-AP ROM base: 0xE00FF000
- CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
- Found Cortex-M4 r0p1, Little endian.
- CPU could not be halted
- CPU could not be halted
- CPU could not be halted
- ERROR: Failed to halt CPU.
- Executing init sequence ...
- ERROR: Failed to connect.
Could not perform custom init sequence.

[lukaszadrapa]

Hi @Toneon5 

we can check your schematic to confirm that everything is correct. Is it possible to share it? And if there's no problem, I would redirect you rather to Segger.

Regards,

Lukas