Cannot enter VLPS mode

[sungjun]

There is difficulty entering VLPS mode in SPLL mode.
Our project is using the SPLL -> FIRC -> VLPS mode entry procedure.

The SCG status is attached below.

<SPLL>

<SPLL -> FIRC>

After adding OSIF_TimeDelay in this modification, it is impossible to enter VLPS mode. (Trace32 debugger attached)

However, it was confirmed that VLPS mode was entered normally when the debugger was disabled.

For some reason, I cannot enter VLPS mode with the debugger connected?

I am inquiring because I cannot find information in the reference manual.

thank you

[Robin_Shen · Accepted solution]

Hi

Please read the 40.4.5 Debug in low power modes of S32K1xx MCU Family - Reference Manual.
When both requests are asserted, the mode controller handles attempts to enter STOP and VLPS by entering an emulated stop state.

7.3. Tips for making low-power measurements on the bench of AN5425 Power Management for S32K1xx also suggest that you should: Disconnect the debugger and power cycle the MCU

Please refer to the power_mode_switch_s32k144 example in S32K1 SDK.(for example: S32K1 SDK RTM4.0.3 in S32DS v3.4)

As you can see, it will disable SPLL\FIRC\SOSC at line 498 returnCode = POWER_DRV_DisableVlpClockSrc(); by SCG_SetEnableSPLL(false); and SCG_SetEnableFIRC(false);

Best Regards,
Robin
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