AIPS-Lite Writing peripheral registers

[emmanuelaguilas]

Hello,

Reading the reference manual for S32K148 I found the following

It is mention in the "Peripheral bridge (AIPS-Lite) memory map" section, since I'm new on this AIPS and I'm still investigation how it works.

From what I read my understanding is that all writes to peripheral buses are done trough AIPS except for the ones that use Private Peripheral Bus. Is this the case?If that is the case, does this means write-read always apply for for basically all peripheral register or if there is a way to avoid this?

Is it recommended to always do the write-read as a best practice for S32K platforms? 

Regards.

[dianabatrlova]

Hello Emmanuel,

Let me apologize for the late response. I asked our internal contact.

Although this paragraph is within the AIPS section, it is not limited to the AIPS peripherals. For example, if your system requires immediate completion of GPIO output changes and/or SRAM contents modifications, the read-after-write sequence should be executed.  

I hope it helps you.

Best regards,

Diana