Hello @minersrevolt,
I'm really sorry for the late reply, the team's bandwidth is quite limited at the moment.
About your problem, I tested with the hwconfig you mentioned and I was not able to ping other devices through PFE2 using the RDB3. Can you test using the following configuration? these steps are for configuring u-boot trough the command line:
=> setenv hwconfig "serdes0:mode=pcie,clock=ext;pcie0:mode=rc;serdes1:mode=xpcs0&xpcs1,clock=ext,fmhz=125;xpcs1_0:speed=1G;xpcs1_1:speed=1G"
=> setenv ethact pfe2
=> setenv autoload no
=> saveenv
After this, please reboot your board and configure the IP:
=> setenv ipaddr X.X.X.X
Where X.X.X.X is the IP to assign to your board, it should be in the same network segment of the device you want to ping.
You can also get an IP assigned by executing:
=> dhcp
BOOTP broadcast 1
DHCP client bound to address W.W.W.W (200 ms)
where W.W.W.W is the IP that your DHCP server will assign to your board.
after getting a valid IP assigned you will be able to ping other devices, for example your computer:
=> ping Y.Y.Y.Y
Using pfe2 device
host Y.Y.Y.Y is alive
Where Y.Y.Y.Y is the IP of the device that is already connected to the network.
for example, I used the DHCP IP assignment and i did ping on my windows computer (this is after the hwconfig and etchact configuration):
NOTICE: Reset status: Error
NOTICE: BL2: v2.5(release):bsp40.0_rc9-2.5
NOTICE: BL2: Built : 08:41:20, Mar 21 2024
NOTICE: BL2: Booting BL31
U-Boot 2022.04+gd482def7e3+p0 (Mar 21 2024 - 08:40:56 +0000)
SoC: NXP S32G399A rev. 1.1
CPU: ARM Cortex-A53 r0p4 @ max 1300 MHz
Model: NXP S32G399A-RDB3
DRAM: 3.5 GiB
Core: 306 devices, 25 uclasses, devicetree: board
MMC: FSL_SDHC: 0
Loading Environment from MMC... OK
s32cc_serdes_phy serdes@40480000: Using mode 0 for SerDes subsystem
pci_s32cc pcie@40400000: Configuring as RootComplex
pci_s32cc pcie@40400000: Failed to get link up
In: serial@401c8000
Out: serial@401c8000
Err: serial@401c8000
Board revision: RDB3 Revision F
PCIe: BusDevFun VendorId DeviceId Device Class Sub-Class
__________________________________________________________________________
pcie@40400000 RootComplex
| `-- 01:00.00 0x1957 0x4300 Bridge device 0x04
Net: eth0: ethernet@4033c000
Found PFE version 0x0101 (S32G3)
pfeng pfeng-base: Uploading CLASS firmware
pfeng pfeng-base: EMAC0 block was initialized
pfeng pfeng-base: EMAC1 block was initialized
pfeng pfeng-base: EMAC2 block was initialized
pfeng pfeng-base: Enabling the CLASS block
pfeng pfeng-base: PFE Platform started successfully (mask: 7)
s32cc_serdes_phy serdes@44180000: Using mode 3 for SerDes subsystem
s32cc_serdes_phy serdes@44180000: Unstable RX detected on XPCS1
s32cc_serdes_phy serdes@44180000: Unstable RX detected on XPCS0
, eth1: pfe0, eth2: pfe1, eth3: pfe2
Hit any key to stop autoboot: 0
=>
=> dhcp
pfe2 Waiting for PHY auto negotiation to complete....... done
BOOTP broadcast 1
BOOTP broadcast 2
DHCP client bound to address 172.16.103.120 (454 ms)
=> ping 172.16.105.157
Using pfe2 device
host 172.16.105.157 is alive
=>
You can also see from the boot logs that I don't have errors while u-boot is configuring the SerDes instances.
I am using the P3B connector:
Let me know if this information solves your problem.
Hey @alejandro_e thanks for the reply. I would like to try that but one of the problems we have is we have to use PFE2 attached to SERDES0 Lane 1 @ 1.25Gbps which is mode 1/2/3 seen below. This is the only PFE PHY we currently have available on the board.
Given that constraint I can't follow your instructions unfortunately since you are setting SERDES0 in PCIe mode.
Hello @minersrevolt,
Which pins of the S32G3 are you connecting your DP83869 PHY? in the RDB3 the pins used for the P3B are the following:
are you using the same pins?
Thanks for the information in advance.
@alejandro_e No they're not the same, we are using the SGMII mode. SGMII0_TX/RX are tied to the PHY. We have the MDIO bus working to the PHY so it is just the data lanes.
Hello @minersrevolt,
Sorry for the confusion, can you try the steps I mentioned above but with the following configuration:
"serdes0:mode=pcie&xpcs1,clock=ext,fmhz=100;pcie0:mode=rc;xpcs0_1:speed=1G,an=0;serdes1:mode=disable"
I am not able to test if this really works because the RDB3 HW uses the PCIe lanes differently.
all I can see is that u-boot accepts the configuration as valid:
NOTICE: Reset status: Power-On Reset
NOTICE: BL2: v2.5(release):bsp40.0_rc9-2.5
NOTICE: BL2: Built : 08:41:20, Mar 21 2024
NOTICE: BL2: Booting BL31
U-Boot 2022.04+gd482def7e3+p0 (Mar 21 2024 - 08:40:56 +0000)
SoC: NXP S32G399A rev. 1.1
CPU: ARM Cortex-A53 r0p4 @ max 1300 MHz
Model: NXP S32G399A-RDB3
DRAM: 3.5 GiB
Core: 306 devices, 25 uclasses, devicetree: board
MMC: FSL_SDHC: 0
Loading Environment from MMC... OK
Disabling XPCS1_0
Disabling XPCS1_1
s32cc_serdes_phy serdes@40480000: Using mode 2 for SerDes subsystem
s32cc_serdes_phy serdes@40480000: Unstable RX detected on XPCS1
pci_s32cc pcie@40400000: Configuring as RootComplex
pci_s32cc pcie@40400000: Failed to get link up
In: serial@401c8000
Out: serial@401c8000
Err: serial@401c8000
Board revision: RDB3 Revision F
PCIe: BusDevFun VendorId DeviceId Device Class Sub-Class
__________________________________________________________________________
pcie@40400000 RootComplex
| `-- 01:00.00 0x1957 0x4300 Bridge device 0x04
Net: eth0: ethernet@4033c000
Found PFE version 0x0101 (S32G3)
pfeng pfeng-base: Uploading CLASS firmware
pfeng pfeng-base: EMAC0 not used, skipped
pfeng pfeng-base: EMAC1 not used, skipped
pfeng pfeng-base: EMAC2 block was initialized
pfeng pfeng-base: Enabling the CLASS block
pfeng pfeng-base: PFE Platform started successfully (mask: 4)
, eth3: pfe2
Hit any key to stop autoboot: 0
=>
=> printenv hwconfig
hwconfig=serdes0:mode=pcie&xpcs1,clock=ext,fmhz=100;pcie0:mode=rc;xpcs0_1:speed=1G,an=0;serdes1:mode=disable
=> xpcs list
Registered XPCS instances:
| ID | SerDes instance | XPCS |
| 0 | serdes@40480000 | 1 |
=>
as you can see the SerDes mode is 2 and the XPCS active instance is the SerDes0, you can double check that in the device tree [fdts\s32cc.dtsi]:
Let me know if this information solved your problem.
Hello @minersrevolt,
About the loading of s32g_pfe_class.fw, although you need it once you try to ping any IP using pfe2 it should not be related to the initialization errors you are getting for XPCS.
I tried the configuration you shared and I did not get the initialization errors you are getting:
NOTICE: Reset status: Power-On Reset
NOTICE: BL2: v2.5(release):bsp40.0_rc9-2.5
NOTICE: BL2: Built : 08:41:20, Mar 21 2024
NOTICE: BL2: Booting BL31
U-Boot 2022.04+gd482def7e3+p0 (Mar 21 2024 - 08:40:56 +0000)
SoC: NXP S32G399A rev. 1.1
CPU: ARM Cortex-A53 r0p4 @ max 1300 MHz
Model: NXP S32G399A-RDB3
DRAM: 3.5 GiB
Core: 306 devices, 25 uclasses, devicetree: board
MMC: FSL_SDHC: 0
Loading Environment from MMC... OK
Disabling XPCS1_0
Disabling XPCS1_1
s32cc_serdes_phy serdes@40480000: Using mode 2 for SerDes subsystem
s32cc_serdes_phy serdes@40480000: Unstable RX detected on XPCS1
pci_s32cc pcie@40400000: Configuring as RootComplex
pci_s32cc pcie@40400000: Failed to get link up
In: serial@401c8000
Out: serial@401c8000
Err: serial@401c8000
Board revision: RDB3 Revision F
PCIe: BusDevFun VendorId DeviceId Device Class Sub-Class
__________________________________________________________________________
pcie@40400000 RootComplex
| `-- 01:00.00 0x1957 0x4300 Bridge device 0x04
Net: eth0: ethernet@4033c000
Found PFE version 0x0101 (S32G3)
PFEng firmware file 'mmc@0:1:s32g_pfe_class.fw' loading failed: -2
Hit any key to stop autoboot: 0
=>
=> printenv hwconfig
hwconfig=serdes0:mode=pcie&xpcs1,clock=int,fmhz=100;pcie0:mode=rc;xpcs0_1:speed=1G,an=1;serdes1:mode=disable
=> xpcs list
Registered XPCS instances:
| ID | SerDes instance | XPCS |
| 0 | serdes@40480000 | 1 |
=>
The only difference in the device tree node is the following, your node is on the left:
which should no be interfering with the behavior of the device.
Other than the override you did to have xpcs0_1 and xpcs 1_0 both in SGMII, did you change something else on the serdes drivers?
Thanks in advance for the information.
