S32DS / e200z4 hard floats working? (MPC5746R)

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S32DS / e200z4 hard floats working? (MPC5746R)

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jamesmurray
Contributor V

I might be missing something here, but I don't seem to be able to get S32DS for Power v1.2  to actually use hardware floating point maths.

I created the most basic project and made sure that "Use Hardware Floating Point" is ticked, but there are no recognisable floating point instructions in the disassembly.

Unticking, making clean and rebuilding generates output that is exactly the same.

My source:

--------------------

#include "derivative.h" /* include peripheral declarations */

extern void xcptn_xmpl(void);

volatile float test;

int main(void)

{
    volatile int counter = 0;
    xcptn_xmpl ();              /* Configure and Enable Interrupts */

    /* Loop forever */

    for(;;) {       
           counter++;
           test = counter * 1.2345;
    }
}

--------------------

Disassembly snippet 1:

--------------------

           test = counter * 1.2345;
 1003826:    c2 7f           se_lwz  r7,8(r31)
 1003828:    01 73           se_mr   r3,r7
 100382a:    79 ff fa a3     e_bl    10032cc <__floatsidf>
 100382e:    02 40           se_mtar r8,r4
 1003830:    01 37           se_mr   r7,r3
 1003832:    01 73           se_mr   r3,r7
 1003834:    03 04           se_mfar r4,r8
 1003836:    70 a7 e7 f3     e_lis   r5,16371
 100383a:    70 b8 c0 83     e_or2i  r5,49283
 100383e:    70 c2 e2 6e     e_lis   r6,4718
 1003842:    70 d2 c7 8d     e_or2i  r6,38797
 1003846:    79 ff f8 23     e_bl    1003068 <__muldf3>
 100384a:    02 40           se_mtar r8,r4
 100384c:    01 37           se_mr   r7,r3
 100384e:    01 73           se_mr   r3,r7
 1003850:    03 04           se_mfar r4,r8
 1003852:    79 ff fa fb     e_bl    100334c <__truncdfsf2>
 1003856:    01 36           se_mr   r6,r3
 1003858:    70 e8 e0 00     e_lis   r7,16384
 100385c:    54 c7 00 20     e_stw   r6,32(r7)

--------------------

Disassembly snippet 2:

--------------------

010032cc <__floatsidf>:
__floatsidf():
 10032cc:    18 21 06 d8     e_stwu  r1,-40(r1)
 10032d0:    00 80           se_mflr r0
 10032d2:    7c 67 fc 70     e_srwi  r7,r3,31
 10032d6:    48 36           se_li   r6,3
 10032d8:    db 01           se_stw  r0,44(r1)
 10032da:    d2 61           se_stw  r6,8(r1)
 10032dc:    d3 71           se_stw  r7,12(r1)
 10032de:    2a 03           se_cmpi r3,0
 10032e0:    7a 02 00 1a     e_bne   10032fa <__floatsidf+0x2e>
 10032e4:    48 27           se_li   r7,2
 10032e6:    d2 71           se_stw  r7,8(r1)
 10032e8:    18 61 80 08     e_addi  r3,r1,8
 10032ec:    78 00 01 11     e_bl    10033fc <__pack_d>
 10032f0:    cb 01           se_lwz  r0,44(r1)
 10032f2:    00 90           se_mtlr r0
 10032f4:    18 21 80 28     e_addi  r1,r1,40
 10032f8:    00 04           se_blr
 10032fa:    2a 07           se_cmpi r7,0
 10032fc:    7a 12 00 0e     e_beq   100330a <__floatsidf+0x3e>
 1003300:    18 03 ab 80     e_cmpi  cr0,r3,-2147483648
 1003304:    7a 12 00 3e     e_beq   1003342 <__floatsidf+0x76>
 1003308:    00 33           se_neg  r3
 100330a:    7c 67 00 34     cntlzw  r7,r3
 100330e:    7c 65 0c 70     e_srwi  r5,r3,1
 1003312:    18 c7 84 fd     e_addi  r6,r7,-3
 1003316:    18 87 80 1d     e_addi  r4,r7,29
 100331a:    2a 06           se_cmpi r6,0
 100331c:    7c 60 30 30     slw     r0,r3,r6
 1003320:    18 e7 b0 1f     e_subfic r7,r7,31
 1003324:    18 c4 b0 1f     e_subfic r6,r4,31
 1003328:    42 43           se_slw  r3,r4
 100332a:    7c a6 34 30     srw     r6,r5,r6
 100332e:    d4 71           se_stw  r7,16(r1)
 1003330:    48 05           se_li   r5,0
 1003332:    7c c6 00 1e     isellt  r6,r6,r0
 1003336:    7c 63 28 1e     isellt  r3,r3,r5
 100333a:    d6 61           se_stw  r6,24(r1)
 100333c:    d7 31           se_stw  r3,28(r1)
 100333e:    79 ff ff aa     e_b     10032e8 <__floatsidf+0x1c>
 1003342:    70 78 e1 e0     e_lis   r3,49632
 1003346:    48 04           se_li   r4,0
 1003348:    79 ff ff a8     e_b     10032f0 <__floatsidf+0x24>

--------------------

According to VLEPEM.pdf, I was expecting to see opcodes:

efsXXXX or efdXXXX for hardware floating point instructions.

I also disassembled many of the libraries that are installed (libgcc.a) and wasn't able to find one that included any of those either - they all appeared to be using that slow software implementation shown above.

Also,

- is there a core reference manual for e200z425n3?

- is there an accurate VLE reference manual that includes all opcodes that S32DS is using? (isellt above is missing from VLEPEM.pdf)

James

1 Solution
1,292 Views
jamesmurray
Contributor V

I can answer my own question here.

I hadn't used floats on an embedded platform before and didn't realise that the compiler is automatically treating 1.2345 in my example as 'double' not 'float'. Using 1.2345f instead lets the compiler use the hardware single precision floating point instructions.

Adding -Wdouble-promotion to the compiler flags warns of the original coding error.

James

View solution in original post

2 Replies
1,292 Views
stanish
NXP Employee
NXP Employee

Hi James,

You are right. Thanks for sharing the solution!

BTW: if you are interested in the optimized production grade single precision math routines you can possibly use AMMCLIBs  (Automotive Math and Motor Control Library Set|NXP )

I'd recommend you to install the latest S32DS Power update which includes ammclib v1.1.9 libs plus new project wizard integration.

pastedImage_289.png

Hope it helps.

Stan

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1,293 Views
jamesmurray
Contributor V

I can answer my own question here.

I hadn't used floats on an embedded platform before and didn't realise that the compiler is automatically treating 1.2345 in my example as 'double' not 'float'. Using 1.2345f instead lets the compiler use the hardware single precision floating point instructions.

Adding -Wdouble-promotion to the compiler flags warns of the original coding error.

James