I update my S32DS ID to 3.5 and running the Port_Example_S32K344 example on S32K3X4EVB-Q172 board using PEmicro Debugger. It works as expected, but If I changed optimization level from -Os to -O3, I encountered the 'Break at address "0x0" with no debug information available, or outside of program code' error and cannot debug any more. I'm using SW32K3_RTD_4.4_R21-11_3.0.0_D2303_DS_updatesite
I find the root cause is inside startup code. If change Optimization level to Os in the Startup_Code folder, the code could run as expected.
If Change to O3, the problem will happen after vldr d7, [r1] instruction inside startup.c/init_data_bss function. This is corresponding to the c code ram[j] = rom[j]; where is to copy rom data from __INIT_INTERRUPT_START address 0x00400800 to __RAM_INTERRUPT_START DTCM address 0x20000000. If using Os settup, the assembly is using different instruction ldr.w r7, [r1, r4, lsl #2] and str.w r7, [r0, r4, lsl #2].
Wondering If you have any better explanation or workaround about failure case if using O3 optimization.
I find the root cause is inside startup code. If change Optimization level to Os in the Startup_Code folder, the code could run as expected.
If Change to O3, the problem will happen after vldr d7, [r1] instruction inside startup.c/init_data_bss function. This is corresponding to the c code ram[j] = rom[j]; where is to copy rom data from __INIT_INTERRUPT_START address 0x00400800 to __RAM_INTERRUPT_START DTCM address 0x20000000. If using Os settup, the assembly is using different instruction ldr.w r7, [r1, r4, lsl #2] and str.w r7, [r0, r4, lsl #2].
Wondering If you have any better explanation or workaround about failure case if using O3 optimization.
