Modifying Memory Map in HED Controller

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Modifying Memory Map in HED Controller

696 Views
Madushan
Contributor II

Hello everyone,

I am working with the HED controller, and I'm facing a space limitation issue. I am considering placing the firmware in the unpaged memory area and would like some insights on the potential implications of modifying the memory map.

Currently, the .prm file specifies the paged areas as follows:

```
PAGE_E2 = READ_ONLY 0xE28000 TO 0xE2BFFF;
PAGE_E3 = READ_ONLY 0xE38000 TO 0xE3BFFF;
PAGE_E4 = READ_ONLY 0xE48000 TO 0xE4BFFF;
```

According to the manual:

"The program page index register allows accessing up to 4 Mbyte of FLASH or ROM in the global memory map by using the eight-page index bits to page 16 Kbyte blocks into the program page window located in the CPU local memory map from address $8000 to address $BFFF (see Figure 1-16). The CPU has special access to read and write this register during execution of CALL and RTC instructions."

I am thinking of modifying the memory map to the following:

```
PAGE_E3 = READ_ONLY 0xE38000 TO 0xE47FFF;
```

In the .prm file, I don't see the space from 0xE3C000 to 0xE47FFF assigned to anything. However, the manual states:

"The upper 16-kilobyte block of the local CPU memory space ($C000–$FFFF) is unpaged. It is recommended that all reset and interrupt vectors point to locations in this area or to the other unpaged sections of the local CPU memory map."

Could anyone help me understand the potential issues, beyond timing and efficiency, that could arise from this change? Specifically, I am concerned about the possibility of overlapping areas that are assigned by default.

Appreciate your help and insights!

Thank you!

Madushan

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lama
NXP TechSupport
NXP TechSupport

The memory window is always PPAGE_(8000-BFFF). There I no possibility to use global address space for code. It is possible to do it only for data because the MCU contains data access commands for global address.

So, he code must be able to fit into the PPAGE pages. Also interrupt routines MUST start in the non-paged space C000-FFFF or 4000-7FFF(if enabled).

 

The prm file>

You:

      ROM_C000      = READ_ONLY     0xC000 TO   0xEEFF;

/*    VECTORS       = READ_ONLY     0xEF00 TO   0xEFFF; intentionally not defined: 'system' layer vector table */

                 ROM_BOOT                     = READ_ONLY                    0xF000 TO           0xFEFF;

 

Could be

      ROM_C000      = READ_ONLY     0xC000 TO   0xEFFF;   //

/*    VECTORS       = READ_ONLY     0xEF00 TO   0xEFFF; intentionally not defined: 'system' layer vector table */

                 ROM_BOOT                     = READ_ONLY                    0xF000 TO           0xFEFF;

 

You ROM 6000 so I suppose you also use in compiler command line -OnB=b                    

 

Moreover, I am not able how you use your data and code pragmas.

 

The most important is to generate *.map file and compare it with the expectations you programmed in the *.prm files and *.c files.

Take it that *.prm file contains your expectations. *.map file contains what you really did and where it is placed. Then you can also see mistakes you did.

 

 

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Madushan
Contributor II

Hi Lama,

Thank you very much for your response and the provided document. It is very helpful.

This is specifically for the HED MC9S12XDP512 controller.

Background:
I was just introduced to this project, and unfortunately, anyone previously involved in its development has left the company.
I am now trying to understand the memory allocation, as the code has exceeded the paged memory space.

When I reviewed the local memory map, I understand that the ranges from $4000 to $8000 and $C000 to ($FFFF - Reset Vector Space)
are not within the paged/PPAGE memory space. I do not understand how this unpaged memory space maps to the global addresses
(as shown in column 2 of the DOC-XDP512-MMC-Memory_Map-Common_Map-V5_0-MSExcel.xls). I am still reviewing the manual
MC9S12XDP512RMV2.pdf as well to understand this concept.

I wonder if there is a way to use or free up the unpaged Flash space for application code or the firmware.
Any assistance in achieving this would be greatly appreciated.

I attempted to change the memory map to utilize the unpaged Flash space as follows, and I can build the firmware without
any warnings or errors. However, I am unsure what potential issues this might cause or if there are any problems that I might
not notice.

Original Code:
PAGE_E2 = READ_ONLY 0xE28000 TO 0xE2BFFF;
PAGE_E3 = READ_ONLY 0xE38000 TO 0xE3CFFF;
PAGE_E4 = READ_ONLY 0xE48000 TO 0xE4BFFF;

 

Modified Code:
PAGE_E3 = READ_ONLY 0xE38000 TO 0xE3CFFF;

In the modified code segment: what is the address range w.r.t. global addressing the the range from 0xE3C000- E3CFFF is belong to? 

I would appreciate any insights or advice on this matter.

The original .prm file is attached. 


Thank you.

Madushan

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lama
NXP TechSupport
NXP TechSupport

Hi,

the MCU is?    MC9S12 xxxxx ?

If it is XDP512 or XEP100 the memory map is attached.

Best regards,

Ladislav

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Madushan
Contributor II
@lama Instead of replying to your response I have place the response in the main discussion above. Appreciate your support and please have a look.
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