Hi,
There is not enough info in your description to say exactly what wrong you are doing. So, allow me to make considerations about your issue.
Just check….
The test for TOF is useless because interrupt means the TOF is set.
Tov = 65536 * (32/20,000,000) = 0.1048576 s … Timer period to overflow
Expected number of overflows 0.172s / 0.1048576 s = 1.64
Note: TFFCA
Timer Fast Flag Clear All
0 Allows the timer flag clearing to function normally.
1 For TFLG1(0x000E), a read from an input capture or a write to the output compare channel (0x0010–0x001F)
causes the corresponding channel flag, CnF, to be cleared. For TFLG2 (0x000F), any access to the TCNT
register (0x0004, 0x0005) clears the TOF flag. Any access to the PACNT registers (0x0022, 0x0023) clears
the PAOVF and PAIF flags in the PAFLG register (0x0021). This has the advantage of eliminating software
overhead in a separate clear sequence. Extra care is required to avoid accidental flag clearing due to
unintended accesses.
Moreover, bear in mind Write to TCNT has no meaning or effect in the normal mode; only writable in special modes. If you want to reset the TCNT for another period then it is necessary to combine it with “reset TCNT on TC7 overflow”.
Let’s suppose we will not use TFFCA. If we use it then interrupt flags are cleared manually. Do not combine TFFCA with manual clearing of flags.
Here I write the simple code, not tested, you can compare with yours.
Moreover think about other interrupts whether they are not so often that TOV is not executed because of its priority. Moreover, I think you check the TOV in debug mode and you forget to freeze timer in this mode... look in the code setup of TSCR1.
----------------------------------------------------
#pragma CODE_SEG NON_BANKED
interrupt 16 void TIM_Ovf_Isr(void); // or interrupt ((0xFE-0xDE)/2) void TIM_TC7isr(void);
#pragma CODE_SEG DEFAULT
----------------------------------------------------
static unsigned long TIM_Ovf_Cnt=0;
----------------------------------------------------
#pragma CODE_SEG NON_BANKED
interrupt 16 void TIM_Ovf_Isr(void) // or interrupt ((0xFE-0xDE)/2) void TIM_TC7isr(void);
{
TFLG2 = 0x80;
TIM_Ovf_Cnt++;
}
#pragma CODE_SEG DEFAULT
----------------------------------------------------
void main void
{
//-------------------------------------
// BUSCLK is 20MHz
//.....................................
//You know that you have this clock…
//BUSCLK setup
//-------------------------------------
//Timer clock = BUS_FREQ/(2^PREESCALER_VALUE) = 20MHz/32 = 625kHz; timer period = 1.6us。
//.....................................
TSCR2 = 0B10000101; // enable TIM ovf, No TIM reset dependance of the TC7 channel, PRSC = 32[d]
TSCR1 = 0B11100000;// enab. tim, freeze tim in DBG mode and wait mode, no precision TIM, no fast flag clear
//-------------------------------------
// Enable I-bit maskable interrupts
//.....................................
ASM CLI;
//-------------------------------------
// main loop
//.....................................
while(1)
{
}
//.....................................
}
Best regards,
Ladislav