According to the ATD10B8CV2 block description, during recovery from STOP mode there must be 'a minimum delay for the stop recovery time, tSR, before initiating a new ATD conversion sequence'. What is the value of this stop recovery time, tSR? I can't seem to find reference to it anywhere else. Also, does recovery from Pseudo STOP require the same stop recovery time, tSR, as STOP mode?
Thanks
Hi,
The recovery time tSR is also labeled as tREC (search that keyword in the ATD block description).
The recovery time tREC is 20us. Find that parameter value in the Table A-8 ATD Operating Characteristics, MC9S12DP512
Device Guide V01.26 (PDF number: 9S12DP512DGV1)
The Pseudo Stop mode is entered by executing CPU STOP instruction and all peripherals are turned off similarly to the STOP mode, but the only exception and difference are RTI and COP modules which can stay active.
So the recovery time tREC from Pseudo Stop mode is the same as Stop mode.
I hope you will find this information useful.
Have a great day,
iggi
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