Hi,
I am using MC9s12XEQ384 in 112 pin package.
I can send data on SCI0, SCI4 and SCI5. But SCI7 looks like it is not initialised.
This is what my initialisation looks like :
SPI0CR1 = 0; // Disable SPI
SPI1CR1 = 0;
SPI2CR1 = 0;
PTLRR = 0; // Port L route register
SCI7SR2 = 0x00; // AMAP = 0x80;
SCI0BD = Baud115200; // Fast Baud.
SCI4BD = Baud115200; // Load SCIxBDH and SCIxBDL registers
SCI5BD = Baud115200;
SCI6BD = Baud115200;
SCI7BD = Baud115200;
SCI0CR1 = 0; // 1 Start, 8 Data, 1 Stop bits. Parity disabled
SCI4CR1 = 0;
SCI5CR1 = 0;
SCI6CR1 = 0;
SCI7CR1 = 0;
SCI0CR2 = RE | TE; // Enable Receiver & Transmitter
// The transmit interrupt is setup when there is data to send
SCI4CR2 = RE | TE;
SCI5CR2 = RE | TE;
SCI6CR2 = RE | TE;
SCI7CR2 = RE | TE;
I am sending data as follows :
if ((SCI7SR1 & TDRE) != 0) // Transmit data register empty
SCI7DRL = 0x55;
if ((SCI6SR1 & TDRE) != 0) //
SCI6DRL = 0x55;
if ((SCI4SR1 & TDRE) != 0) //
SCI4DRL = 0xaa;
if ((SCI5SR1 & TDRE) != 0) //
SCI5DRL = 0xaa;
if ((SCI0SR1 & TDRE) != 0) //
SCI0DRL = 0x55;
The TDRE bit in SCI7SR1 is never set.
Which to points to initialisation.
What am I missing?
Solved! Go to Solution.
I think I have found it.
My processor does not have SCI 6 and 7
Does someone have Processor Expert ?
I would like to see how it initialises SCI0 and SCI7.
I can get SCI0, 4 and 5 to initialise and to send data.
Thanks
Yes, you are right.
As you can see in Table D-2 of Ref Manual: https://www.nxp.com/docs/en/data-sheet/MC9S12XEP100RMV1.pdf
And pinout explanation:
So you can use only 6 SCI modules.