Where is the address of GIC registers in TWR-LS1021A

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Where is the address of GIC registers in TWR-LS1021A

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takumishimada
Contributor II

Hi,

I'm developing bare-metal application on TWR-LS1021A.

I want to configure GIC, but I cannot find the registers' address of GIC.

To configure GIC, we need to know the CPU interface base address and the distributor base address.

In the reference manual of LS1021A, there are the address map.

But there seems to be only "GIC400" address.

Is the address of "GIC400" distributor base address? And the CPU interface base address is "GIC400" address + 0x8000?

Regards,

Shimada

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lunminliang
NXP Employee
NXP Employee

Hi,

That's right.

The GIC-400 implementation defines the distributor offset within the GIC – this is shown == 0x1000 in the GIC-400 TRM, section 3.2 “GIC-400 register map”. The GIC-400 offset within the SOC memory map is defined by LS1021A interconnect address decode implementation. So the distributor system address is:

  <GIC_offset> defined by LS1021A

+ 0x1000 distributor offset

And a specific distributor register such as the GICD_SGIR would then be located at address:

  <GIC_offset> defined by LS1021A

+ 0x1000 distributor offset

+ 0xf00 GICD_SGIR register offset

Here the 400 is the version of GIC I think.

GIC-400 memory map

Address range GIC-400 functional block

0x0000-0x0FFF Reserved

0x1000-0x1FFF Distributor

0x2000-0x3FFF CPU interfaces

0x4000-0x4FFF Virtual interface control block, for the processor that is performing the access

0x5000-0x5FFF Virtual interface control block, for the processor selected by address bits [11:9]

0x5000-0x51FF

0x5200-0x53FF

...

0x5E00-0x5FFF

Alias for Processor 0

Alias for Processor 1

...

Alias for Processor 7

0x6000-0x7FFF Virtual CPU interfaces


Have a great day,
Lunmin

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addiyi
NXP Employee
NXP Employee

Hi Shimada,

Block base address for GIC is 140_0000 to 14F_FFFF.

Adrian

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takumishimada
Contributor II

Hi Adrian,

You mean the distributor base address is 140_0000 and the CPU interface base address is 148_0000, right?

Shimada

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takumishimada
Contributor II

Sorry. I misunderstand the GIC register mapping.

The distributor base address is 140_1000, and the CPU interface base address is 140_2000, right?

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lunminliang
NXP Employee
NXP Employee

Hi,

That's right.

The GIC-400 implementation defines the distributor offset within the GIC – this is shown == 0x1000 in the GIC-400 TRM, section 3.2 “GIC-400 register map”. The GIC-400 offset within the SOC memory map is defined by LS1021A interconnect address decode implementation. So the distributor system address is:

  <GIC_offset> defined by LS1021A

+ 0x1000 distributor offset

And a specific distributor register such as the GICD_SGIR would then be located at address:

  <GIC_offset> defined by LS1021A

+ 0x1000 distributor offset

+ 0xf00 GICD_SGIR register offset

Here the 400 is the version of GIC I think.

GIC-400 memory map

Address range GIC-400 functional block

0x0000-0x0FFF Reserved

0x1000-0x1FFF Distributor

0x2000-0x3FFF CPU interfaces

0x4000-0x4FFF Virtual interface control block, for the processor that is performing the access

0x5000-0x5FFF Virtual interface control block, for the processor selected by address bits [11:9]

0x5000-0x51FF

0x5200-0x53FF

...

0x5E00-0x5FFF

Alias for Processor 0

Alias for Processor 1

...

Alias for Processor 7

0x6000-0x7FFF Virtual CPU interfaces


Have a great day,
Lunmin

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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