[MC33926] FB and INV pins

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[MC33926] FB and INV pins

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TomasVaverka
NXP TechSupport
NXP TechSupport

Hi Steve,

May I ask you for your comments on these two questions regarding the MC33926, please?

Q1) Please specify the maximum current from the FB pad (I_FB).
The I_FB is specified to max 17.15mA with the condition IOUT=6.0A, but maximum IOUT may be more than 6.0A so the maximum I_FB could be more than 17.15mA. To prevent overvoltage conditions for MCU's ADC input circuit, please specify max I_FB.

Q2) I could not find the logical function of INV pad, but is my following understanding correct?
INV=Low (V_INV < VIL) ... OUT1 and OUT2 are "non-inverted"
INV=High(V_INV > VIH) ... OUT1 and OUT2 are "inverted"
And, changing INV level makes changing OUT1/OUT2 output immediately, right?

Thanks!

T.

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steve_everson
NXP Employee
NXP Employee

A1) True, there could be higher than the maximum parametric value of current on the output for FB.  The maximum rated output of the circuit is 20mA, which would correspond to about 8A in the HS transistor.  A further point is that the FB output is a current mirror of the SUM of the forward currents in both HS transistors.  There are two ways to insure the ADC input is not overloaded, one is to keep the resistor value which develops the sense voltage small enough that the sense voltage cannot exceed the input rail.  The other way is to insure that the input to the ADC is clamped to a safe voltage.  This utilizes the input filter for the ADC in conjunction with either a diode connection to a positive supply or a zener/TVS which is sized correctly.  Note, that most ADC have an input clamp on the input already, so sizing the filter resistor appropriately should provide adequate protection.

A2)The logical function is stated in the functional description.  Your understanding is correct.  You are also correct in the assumption that the change in input is immediate, this is a combinatorial logic with the IN1 and IN2 pins, so the outputs are switched immediately.

 

BR

Steve

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steve_everson
NXP Employee
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A1) True, there could be higher than the maximum parametric value of current on the output for FB.  The maximum rated output of the circuit is 20mA, which would correspond to about 8A in the HS transistor.  A further point is that the FB output is a current mirror of the SUM of the forward currents in both HS transistors.  There are two ways to insure the ADC input is not overloaded, one is to keep the resistor value which develops the sense voltage small enough that the sense voltage cannot exceed the input rail.  The other way is to insure that the input to the ADC is clamped to a safe voltage.  This utilizes the input filter for the ADC in conjunction with either a diode connection to a positive supply or a zener/TVS which is sized correctly.  Note, that most ADC have an input clamp on the input already, so sizing the filter resistor appropriately should provide adequate protection.

A2)The logical function is stated in the functional description.  Your understanding is correct.  You are also correct in the assumption that the change in input is immediate, this is a combinatorial logic with the IN1 and IN2 pins, so the outputs are switched immediately.

 

BR

Steve

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