About Power Sequencing for MPC8544VJANGA

[TYMM]

Hi everyone.

I have a question about Power Sequencing for MPC8544VJANGA.

On page 12 of the data sheet, under 2.2 Power Sequencing, it says, "Note that all supplies must be at their stable values within 50 ms."

Does it mean that it takes less than 50ms from when the first power supply (for example, VDD) comes up to when the last power supply (for example, GVDD) comes up?

[Hector_Villarruel]

Hello @TYMM 

Please also note that the datasheet indicates:

"First of all, in the Chapter 2.2 Power Sequencing of the MPC8544 Dataseet we can find:

"Note that all supplies must be at their stable values within 50 ms."

You have longer power sequence. And: "From a system standpoint, if any of the I/O power supplies ramp prior to the VDD core supply, the I/Os associated with that I/O supply may drive a logic one or zero during power-up, and extra current may be drawn by the device." 

Each power supply including VDD on customer's board can ramp-up within 50msec

Please guarantee that ALL power supplies must ramp-up within 50msec.

Have a great day.

Hector Villarruel