Hi I have a question as follows,I have designed a board using P2020,it was designed refering the development board.It can't be attached by the emulator(ICE2),the debug window shows"trying force hold off mode failed".The power module operates smoothly.The Hreset and Treset work as p2020rm says.The ready_p1 swings between "0" and "1".So could you tell me what i need to check?
Please consider to open a technical case:
How I could create a Service Request?
Please provide:
1) a digital scope trace simultaneously showing the following signals:
/HRESET
/HRESET_REQ
READY_P1
2) the processor connection schematics as searchable PDF
3) use a digital scope to chek power-on levels of all signals having note 15 in the P2020 QorIQ Integrated Processor Hardware Specifications, Table 1. P2020 Pinout Listing
4) what are measured power-on levels of the cfg_rom_loc[0:3] signals?