I'm afraid we do not have this software example ready to share.
In general, to cache some piece of code, you have to execute "icbt" instruction over this address space with address increment equal to one cache line size.
But in this case you should keep in mind that this cached part of code may reside in cache until the next interrupt. When interrupt handler is called, your cache may be loaded with a new data (instructions of cache handler)
If you wish to load some piece of code and lock it in cache, please use "load and lock set" instruction - icbtls. Note is you use cache locking, you should check for overlocking condition.
For the example code for overlocking condition detection please look e500 Core Reference Manual, Section 3.8.4
http://cache.nxp.com/files/32bit/doc/ref_manual/E500CORERM.pdf
Have a great day,
Alexander
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