Don't understand the FCM ram buffer for NAND FLASH

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Don't understand the FCM ram buffer for NAND FLASH

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philippeleray
Contributor II

Hi,

It's the first time I use a P2020 with a NAND Flash on the local bus, with the FCM.

NAND flash are new for me.

In the reference manual, the FCM use some RAM buffers.

I don't find where are located these buffers.. in DDR ? it's dedicated registers ? it's DMA ?

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r8070z
NXP Employee
NXP Employee

The P2020 FCM supports 8-bit parallel NAND flash only.

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r8070z
NXP Employee
NXP Employee

Have a great day,

The FCM buffers SRAM is part of the P2020 local bus controller (eLBC). It is located on the P2020 chip. You can use this SRAM even in case when NAND chip (and/or any memory) is not connected to the P2020. In order to access this SRAM we should enable at least one eLBC bank assigned to the FCM (eLBC_BRn[MSEL] = 001 //FCM). Correspondingly eLBC_BRn[BA] defines base address of the SRAM.

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philippeleray
Contributor II

I have see limitation to 2k pages. There is a limitation to x8 bus too ? os I could use 16x bus ?

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r8070z
NXP Employee
NXP Employee

The P2020 FCM supports 8-bit parallel NAND flash only.