P4080 Ethernet Specific FAQs

[#1]

The SGMII SerDes of the 4080 can operate at either 1.25G or 2.5G. Is there a register to configure this or it just depends on the clock multipliers of the SerDes PLL?

As long as you select the RCW settings for SRDS_PRTCL and the DIV and RATIO settings to select the clock speed, the SerDes registers will default to the correct value based on those RCW settings.

Does P4080 SerDes in XAUI mode support 10GBase-CX4 (IEEE802.3 clause54)? In other words, are SerDes XAUI receivers and transmitters capable of communication over a 15 meter 10GBase-CX4 cable?

P4080 is not designed for such long distances. An appropriate 10GBASE-CX4 PHY is needed to support such distances.

[gopikrishnan]

I use p4080DS rev2.x board. SGMII interfaces working in u-boot but not from linux. Any Idea?

I detailed my problem with P4080DS SGMII https://community.freescale.com/thread/315515

[yipingwang]

Please add text ";serdes:fsl_srds_lpd_b2=0xf" to u-boot environment variable hwconfig,

saveenv, and reset your system to the specific bank, this disables fm2-10g.

[gopikrishnan]

But, already all interfaces of SGMII card FM2@DTSEC1 ,FM2@DTSEC2, FM2@DTSEC3, and FM2@DTSEC4 are working on u-boot by assigning each to U-BOOT variable "ethact". The problem is all these ports belongs to SGMII is not working under only under Linux. I guess driver issue, do we need to get drivers for SGMII add-on card?. Does Linux kernel on SDK 1.4 already has it? If so, what are the options need to be enabled in Linux kernel config to provide driver support for SGMII add-on card?