The NAND flash timing parameters at boot time can be somehow controlled with the BOOT_CFG signals/fuses and the Flash Configuration Block data. For details, refer to the Sections 8.5.2.1 "NAND eFUSE configuration" and 8.5.2.3 "Firmware configuration block" of the i.MX6UltraLite Reference Manual document.
Best Regards,
Artur
