PCF2127 and TS pin

[ivekengineer]

What should the voltage be on the TS pin (unconnected to any external devices) relative to either VBAT or VDD?  Should it be any different with TSOFF = 0 vs. TSOFF = 1?

On my board, when VBAT is ~2.5V I am measuring ~2.0V on my TS pin.  This would imply that either I'm leaking 2.5uA through the 200k pull-up resistor, or there is a diode from VBAT to one leg of the internal 200k pull-up resistor.  I would like to make sure I'm  not leaking 2.5uA as that would significantly reduce my supercap hold-up time.

[guoweisun]

I tested in EVB with Vbat@3.2V and Ts@3.15V,so the leakage current is about 0.3uA.

[ivekengineer]

Was that with a setting of TSOFF = 0 or TSOFF = 1?  Would that even make a difference?

[guoweisun]

This is decided by open drain structure,I don't think they are difference when the bit set or not!

[ivekengineer]

That's what I would expect but I wanted to make sure.  Thanks!

BTW, I suspect my DMM has a low input impedance and that is why I'm seeing a larger voltage drop on my TS pin vs. yours.