Using NXP S32K146 EVM FlexIO to send more than 4 bytes of data through SPI

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Using NXP S32K146 EVM FlexIO to send more than 4 bytes of data through SPI

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KVK
Contributor II

Hi.. 

We are working on a 48V BMS where our Main controller is S32K146 and Slave IC is BQ79616. There is an SPI communication IC BQ79600 in between to facilitate SPI comm between Master and Slave.

In order to wakeup the BQ79600, we need to send a wakeup ping on MOSI which is to toggle the GPIO pin used for MOSI.

After this, for fetching data from Slave, we need to access the registers by sending a frame minimum of 6 bytes on SPI. However, the FlexIO MBDT block doesn't have an option for sending more than 4 bytes. Is there a work around this problem?

Is it possible to achieve this if we change from FlexIO to LPSPI?

We are trying to avoid getting too much into bare metal coding to fasten the development process. Need immediate assistance on this as the entire project is at stake.

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mariuslucianand
NXP Employee
NXP Employee

Hello @KVK,

Please find attached the model with the custom code that you have requested. 

On the step function, you can observe that we have multiple intervals, on both MOSI and CS pins as described in the code snippet you have provided. 

D1 = SpiWake79600();

D2  = delayus (3500);

D3 = SpiWake79600();

D4 = delayus(3500);

D5 = additional time used between calls, this could be extracted from the the D4, when the call shall be actually 600 NOPS

mariuslucianand_0-1694094117508.pngNow, for the actual transfer, we are using the Continous transfer as explained in the thread above and the data transmitted is a counter value, which in this case is [0x23 followed by 0x01 0x02 0x03 0x04 0x05 0x06 0x07]. For the entire 8-byte packet, the CS pin was set to low.  In this way, you could send variable messages of different byte sizes.

mariuslucianand_1-1694094645430.png

Important parts inside the models:

1. In the initialize subsystem there 2 types of blocks. There is a custom code, that sets the delay between the SPI bytes, this could be adjusted by hand. Also, there are 2 GPO blocks that also configure the MISO and CS pins as GPIO, but we will change the MUX inside the other custom code part. MBDT automatically cross-checks the pins so that the same pin is not used on different peripherals. We shall disable the check for the SPI inside the main config block.

mariuslucianand_2-1694097559569.png

2.  The actual delay has been generated using custom code. You can see the code snippet below together with additional comments. You could adjust the D4 from line number 30.  The way in which we are using the custom code, has been described in the following article: https://community.nxp.com/t5/NXP-Model-Based-Design-Tools/How-to-use-your-own-C-code-in-our-Toolbox-... 

mariuslucianand_3-1694098019169.png

I have attached the model. Please try it on your side and let me know if there are additional questions!

Hope this helps,

Marius

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5 Replies
743 Views
KVK
Contributor II

Hi @mariuslucianand 

Now that the BQ79656 BMS IC is up and running, we are now trying to figure out the configurations and SPI communication part.

I have attached the Sample code for the IC. I want to understand how to implement it using MBDT.

KVK_0-1694657048273.png

 

Regards

Vamshi

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KVK
Contributor II

Hi @mariuslucianand

Thanks for the code. It is working now.

Regards

Vamshi

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957 Views
KVK
Contributor II

Hi Marius,

 

Thanks for your reply.

Pls refer to below details required for the custom code.

1. SPI instance and pin details

LPSPI Instance: 2

LPSPI_Pinouts.PNG

 2. MATLAB Version: MATLAB 2023a

Kindly do provide the code for using SPI pins as GPIO pins and details to include the same in MATLAB model.

I am attaching the SPI sample code snip provided by slave manufacturer, that will give you the better clarity on our application.

KVK_1-1693983957676.png

KVK_0-1693983792082.png

We need to call the above "SpiWake" function twice in order to successfully wake up the bridge device. We are able to achieve the same using FlexIO SPI but facing difficulties while sending the SPI request and command frames to slave device. As you suggested will switch to LPSPI once we have the custom code from your side.

In your reply you mentioned CS pin gets asserted during data out on MOSI...are meaning to say CS pins goes low while there is data out on MOSI line...?

Our slave needs CS pins to be pulled low when there is start of frame on MOSI and gets high on end of frame...this way slave understands between SOF and EOF of write and read frames.

Also, slave needs SPI CLK frequency to be at 2 - 6 MHz, is there any setting in MBDT where we can set that...? or is it co-related to SPI baud-rate and bits per clock...?

 

Thanks,

Vamshi K

 

 

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mariuslucianand
NXP Employee
NXP Employee

Hello @KVK,

Please find attached the model with the custom code that you have requested. 

On the step function, you can observe that we have multiple intervals, on both MOSI and CS pins as described in the code snippet you have provided. 

D1 = SpiWake79600();

D2  = delayus (3500);

D3 = SpiWake79600();

D4 = delayus(3500);

D5 = additional time used between calls, this could be extracted from the the D4, when the call shall be actually 600 NOPS

mariuslucianand_0-1694094117508.pngNow, for the actual transfer, we are using the Continous transfer as explained in the thread above and the data transmitted is a counter value, which in this case is [0x23 followed by 0x01 0x02 0x03 0x04 0x05 0x06 0x07]. For the entire 8-byte packet, the CS pin was set to low.  In this way, you could send variable messages of different byte sizes.

mariuslucianand_1-1694094645430.png

Important parts inside the models:

1. In the initialize subsystem there 2 types of blocks. There is a custom code, that sets the delay between the SPI bytes, this could be adjusted by hand. Also, there are 2 GPO blocks that also configure the MISO and CS pins as GPIO, but we will change the MUX inside the other custom code part. MBDT automatically cross-checks the pins so that the same pin is not used on different peripherals. We shall disable the check for the SPI inside the main config block.

mariuslucianand_2-1694097559569.png

2.  The actual delay has been generated using custom code. You can see the code snippet below together with additional comments. You could adjust the D4 from line number 30.  The way in which we are using the custom code, has been described in the following article: https://community.nxp.com/t5/NXP-Model-Based-Design-Tools/How-to-use-your-own-C-code-in-our-Toolbox-... 

mariuslucianand_3-1694098019169.png

I have attached the model. Please try it on your side and let me know if there are additional questions!

Hope this helps,

Marius

1,009 Views
mariuslucianand
NXP Employee
NXP Employee

Hello @KVK,

Thank you for posting your question on the NXP MBDT Community.

If my understanding is correct, you want to communicate with the BCC analog front-end over SPI using a variable data length for the SPI transfer. As you have described in your question, there are a couple of requirements you have to match for successful communication. I will try to resume and address some of the requirements, but in order to help you, we also need some information from your side.

1. Sending a minimum of 6 bytes on transfer.

For such a task, I would suggest using the native LPSPI instead of FlexIO. My guess here is that the CS pin needs to remain asserted as long as the transfer of the minimum 6-byte frame is performed. You could achieve this using the Continuous transfer, the Advanced option of the SPI_Config block.

mariuslucianand_0-1693951592059.png

 

When this Continuous transfer option is used if an array is sent using the LPSPI transfer block, then for the entire size of the Data TX buffer the CS pin is asserted and the transfer for a minimum of 6 bytes is performed. If the master_send array has 8 8-byte commands, then the LPSPI will send the 8-byte frame.

mariuslucianand_1-1693951621524.png

2. Waking up the device

For such a task it is clear that the MOSI pin needs to be controlled as the GPIO and then controlled by the SPI peripheral. This functionality could be achieved in MBDT by using some custom code in which the SOUT pin is muxed to the GPIO, controlled as required by the external chip, and then muxed back to the SPI as SOUT to be used as MOSI. In order for us to provide an example in Simulink on how to achieve that, we need to know which MOSI pin are you going to use for your prototype.

mariuslucianand_2-1693951854370.png

3. Usage of FlexIO vs SPI

Given the points from 1 and 2, I would recommend switching to the native LPSPI blocks and pins.

So, I would like to ask you the following questions:

1. Which SPI instance and pins are you planning to use, so that we can give you an example of how to wake up the device using the MOSI pin as you have described in the initial question?

2. Which MATLAB version are you using?

As you may already know, NXP has also a solution for the Battery Management System, and MBDT for S32K1 comes with dedicated blocks to address the NXP analog front end. For more details please have a look at this article here: https://community.nxp.com/t5/NXP-Model-Based-Design-Tools/BMS-amp-MBDT-Designing-Battery-Management-...

Regards,

Marius

 

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