Kinetis K66 I2C controller hang issue

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Kinetis K66 I2C controller hang issue

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geovarghese
Contributor II

Is there any known issue with K66 I2C controller which hangs at higher frequencies? We are observing that the K66 I2C controller hangs and the SCL line is pulled low. This happens frequently at 400KHz and rarely at 100KHz. At 40KHz the I2C bus does not hang. We are using MQX RTOS ver 4.0. We need the I2C bus to operate at 400KHz. Please help!

We have reset all other devices in the I2C bus when it hangs but still the SCL line is held low. So it seems like the issue is with the K66 I2C controller itself.

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geovarghese
Contributor II

We captured the I2C bus using logic analyzer and observed that the SCL line is pulled low after completion of Setup Write / Setup Read transaction. It seems like the I2C ACK interrupt is not invoked by the I2C controller even though the logic analyzer data capture shows ACK send by the slave device in the bus. As per K66 reference manual "SCL is held low until TXAK is written" (as per section 58.4.3 I2C Control Register 1) and it is during ACK / NAK interrupt that the TXAK bit is written in the MQX interrupt routine.

Is there any chance for the K66 I2C controller to miss ACK / NAK interrupt. Is there any dependency on this with module clock frequency settings. We are not able to ship our product due to this issue.

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danielchen
NXP TechSupport
NXP TechSupport

Hi Geo Varghese

I would suggest you dump I2C register to get the real baud-rate when this issue happens.

Could you please send us your schematics and your scope shot and i2c register dump?

You can submit a ticket  (support requests) to us if you won't post your schematics in public.

Support|NXP 

Regards

Daniel

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geovarghese
Contributor II

I have opened new private support ticket to share the relevant details.

Case:00124676:Kinetis K66 I2C controller hang issue

Case:00124679:Attachment for Case 00124676

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geovarghese
Contributor II

Hi danielchen@fsl

The I2C register dump captures using JTAG tool when the bus hangs is given below:

Inter-Integrated Circuit (I2C1),I2C1_A1,0xC0,0x40067000
Inter-Integrated Circuit (I2C1),I2C1_A2,0xC2,0x40067009
Inter-Integrated Circuit (I2C1),I2C1_C1,0xF0,0x40067002
Inter-Integrated Circuit (I2C1),I2C1_C2,0x00,0x40067005
Inter-Integrated Circuit (I2C1),I2C1_D,0x41,0x40067004
Inter-Integrated Circuit (I2C1),I2C1_F,0x1C,0x40067001
Inter-Integrated Circuit (I2C1),I2C1_FLT,0x20,0x40067006
Inter-Integrated Circuit (I2C1),I2C1_RA,0x00,0x40067007
Inter-Integrated Circuit (I2C1),I2C1_S,0xA4,0x40067003
Inter-Integrated Circuit (I2C1),I2C1_SLTH,0x00,0x4006700a
Inter-Integrated Circuit (I2C1),I2C1_SLTL,0x00,0x4006700b
Inter-Integrated Circuit (I2C1),I2C1_SMB,0x00,0x40067008

The screenshot from the Logic analyzer is attached for the last transaction just before I2C hangs. imgpsh_fullsize.png

Need to check if I can share the schematics privately and will confirm after that. Basically we have the K66 and the Panasonic HDMI switching chip MN864788 on the I2C bus. All other devices are currently isolated by removing series resistors. 4.7K pullup is used for I2C SCL and SDA lines (Also tried with 1.5K pull up without any improvement).

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