Table 28 in the MPC5674F Microcontroller Data Sheet Rev 10.1 on page 42 shows only 2 codes for the SIU_ECCR[EBDF[0:1] when operating the processor in Enhanced Mode (264 Mhz) one for 66 Mhz and one for 33 Mhz Febi_cal, does this mean the code for 44 Mhz is not valid for this mode?
Apparently EBDF option “Divide by 3” is reserved as it is so on all other devices from this product line (MPC55xx, MPC5634M, MPC5644A) that are equipped with external bus.
I will report it as documentation error. If it is otherwise, I will notify you.