With 5644A, writing to CRC_CFG register causes a processor exception.
Using the definition of CRC in mpc5644a.h, at address 0xFFE68000
// For example...
CRC.CFG.B.POLY = 0;
Causes a processor exception. What could be wrong?
Solved! Go to Solution.
Hi,
the problem is that CRC registers are not covered by default MMU settings. So, access to the registers leads to bus error and to exception (IVOR1).
Add the following code to your project and it will work. It just creates new MMU page that covers area 0xFFE0_0000 - 0xFFEF_FFFF.
//MMU - TLB6
asm
{
lis r3, 0x1006
mtmas0 r3
lis r3, 0xC000
ori r3, r3, 0x0500
mtmas1 r3
lis r3, 0xFFE0
ori r3, r3, 0x000A
mtmas2 r3
lis r3, 0xFFE0
ori r3, r3, 0x003F
mtmas3 r3
tlbwe
}
Regards,
Lukas
Thanks. Could you please point to where this is documented?
Hi,
the MMU is initialized by BAM code which resides in ROM memory. The same BAM code is used on more devices (not only MPC5644A) for compatibility reasons and also to avoid risk when changing the code. Unfortunately the default MMU settings do not cover CRC module because it is outside the MMU page covering Peripheral Bridge B.
The default MMU settings are:
But here you can see that CRC module is not covered by TLB entry 0:
So, it is necessary to adjust the MMU settings...
Regards,
Lukas
Hi,
the problem is that CRC registers are not covered by default MMU settings. So, access to the registers leads to bus error and to exception (IVOR1).
Add the following code to your project and it will work. It just creates new MMU page that covers area 0xFFE0_0000 - 0xFFEF_FFFF.
//MMU - TLB6
asm
{
lis r3, 0x1006
mtmas0 r3
lis r3, 0xC000
ori r3, r3, 0x0500
mtmas1 r3
lis r3, 0xFFE0
ori r3, r3, 0x000A
mtmas2 r3
lis r3, 0xFFE0
ori r3, r3, 0x003F
mtmas3 r3
tlbwe
}
Regards,
Lukas