Electrical Engineer connecting mpc5777m EBI to a RAM chip. I am curious if I have connected the memory address lines correctly.
The mpc5777m EBI is connected to an SRAM BGA with 1024x 16 bit words and 19 address pins. I added a 20th address pin in case I use the 2048x 16 bit word version of that chip.
PowerPC is opposite endian, so I think that means address bit 31 from the processor is connected to address 0 of the RAM. PPC Address bit 12 is RAM bit 19. PPC bit 11 would be RAM address bit 20.
Then there are Byte enables. PPC 'address bit' 9 would be lower byte enable. PPC addr bit 8 would be upper byte enable.
Is my logic correct? Here are images of my wiring:
If APS=1, then can external address line A31 be connected to A0 pin of external flash or SRAM(16bit data bus)? Is the connection right?
Hi, please take a look at following document, especially section 3, 4, 6:
https://community.nxp.com/docs/DOC-101725
I believe it answers your question.
Does the "address by port size" bit (EBI_OR[APS]) allow the address lines for a 16 bit data port memory to start at 31 instead of 30?
Theoretically yes, but I know an erratum exists for MPC5777C device:
If you are in design stage I would rather recommend to connect it usual way.
We decided to try it, looks like APS=1 is working for us on the MPC5777M, so we are able to use the address line that would otherwise be unusable due to byte select muxing.
If APS=1, then can external address line A31 be connected to A0 pin of external flash or SRAM(16bit data bus)? Is the connection right? what is the result of your trying?
Is there a way to know if this errata also affects the MPC5777M? Does this errata also affect the 77M?