MPC5748G PASS Module Setup / Flash Locking

[coflynn]

Hello,

I'm trying to work with the PASS module for flash locking. As a first step I wanted to test my ability to set the password up without actually 100% bricking my device (I can switch devices with some hassle, so am OK doing a few permanent tests). I did the following:

1) Setup password groups by programming 400120 - 4001C0 (JTAG + group0/1/2/3). Is EVERY bit sequence a valid password? As a test I programmed one to alternating FF's and 00's.... . I wanted something simple as one group.

2) Setup DCF records to CLEAR all the pwgroup lock bits. I wanted to make it easy for me to debug this thing without worrying about the flash being locked.

3) Using debugger, confirm DCF records loaded and all expected things unlocked.

4) Move device to OEM Production lifecycle.

The problem is I can't seem to write the password & have the PGL bit cleared. I've tried the following:

 PASS.CHSEL.R = 0;
 PASS.CIN[0].R = 0x00000000;
 PASS.CIN[1].R = 0x00000000;
 PASS.CIN[2].R = 0xFFFFFFFF;
 PASS.CIN[3].R = 0x00000000;
 PASS.CIN[4].R = 0xFFFFFFFF;
 PASS.CIN[5].R = 0xFFFFFFFF;
 PASS.CIN[6].R = 0x00000000;
 PASS.CIN[7].R = 0x00000000;

if (PASS.PG[pwgroup].LOCK3.B.PGL){
   puts("1\n");
 } else {
   puts("0\n");
 }

I've tried with other PW groups (that have random passwords in case FF's was not allowed). But it never seems to clear this bit (nor can I set/clear bits that should be unlocked). I've read over this section a few times and am still confused about what errors I could have made.

I've tried various orders of words (as there is mention about writing MSB to CIN7), but not sure which order the password is in UTEST? Is there any other examples/documentation?

I'm using P&E for programming/debug.

Regards,

  -Colin O'Flynn

[tianyuliu]

I have encountered some problems concerning the PASSWORD and I would like to consult you.

MyQQ：2280845931

[coflynn · Accepted solution]

Following up for solution: PEBKAC error. At some point later I had turned off the S40 clock (oops!), which kills a lot of peripherals including PASS. The testing from Core1 worked as that code executed before the clock was mangled... it happened the rest of my code wasn't using other impact peripherals.

[coflynn]

Update: If I instead copy the code for entering the password to core1 (which is turned on, but just spins into an idle loop) it WORKS. The password group is unlocked.

But that same code running on core0 does not work. I did not set the MO bit so I can modify them from another core now, but I didn't think there was any core-specific requirement on the password entry?

So at least I have a way forward (push to different core), but seemed very odd, I must be missing something?