Inquiries about MPC5777 EBI bus settings.

[kwru]

Hello. I am using the MPC5777C EVB development board.

I'm contacting you because there was a problem using external SRAM.

If the EVB board uses EBI Clk above 50 MHz, the ALE output does not reach 2V.

There is a problem that the address is not retched due to low voltage.

As a result of testing while changing SIU.PCR [299], the output voltage of the ALE was normalized when the SRC was changed.

It worked when I disabled the slew control of the SRC, but I have not been able to relate the relationship between the SRC and the voltage output.

I am inquiring because I have solved the problem but need to analyze the cause.

 - I changed the settings as follows.

  SIU.PCR[299] 0x0443 -> SIU.PCR[299] 0x040B 

#MPC5777, #EBI

[kwru]

Thank you for your answer!

[davidtosenovjan]

PCR[SRC]

00 Half drive strength with slew control enabled.
01 Full drive strength with slew control enabled.
10 Half drive strength with slew control disabled.
11 Full drive strength with slew control disabled.

"slew control enabled" means edges are intentionally prolonged.

From edges point of view - '00' means slowest edges, '11' means fastest edges.

From currents point of view - '00' and '10' means less current and '01' and '11' means more current.

[davidtosenovjan · Accepted solution]

Thank for your findings!

I haven't noticed this before, actually it does make sense. I will tune my example code that is currently running at 33MHz.

On this device, some EBI pads are pad_sr_hv (medium I/O pads) where PCR register implements SRC settings.

I have checked them and these are ALE (PCR 299) and D_ADD_DAT0 - 15 (PCR 278 – 293).

Actually in newest DS revison, it is stated below EBI specification as a requirement: