Hi. I am using MPC5644A and want to erase Flash memory by using C90FL Driver.
FlashErase have Parameters(in) : lowEnabledBlocks, midEnabledBlocks, highEnabledBlock.
I don't know What I should put a data in lowEnabledBlocks, midEnabledBlocks, highEnabledBlock.
lowEnableBlocks | M1 | M0 | L9 | L8 | L7 | L6 | L5 | L4 | L3 | L2 | L1 | L0 |
data | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
midEnabledBlocks |
|
|
|
|
|
|
|
|
|
| M0 | L0 |
data |
|
|
|
|
|
|
|
|
|
| 0 | 0 |
highEnabledBlock |
|
|
|
|
| H6 | H5 | H4 | H3 | H2 | H1 | H0 |
data |
|
|
|
|
| 0 | 0 | 0 | 0 | 0 | 0 | 0 |
is it right????
if i want to erase 0x4000 Block, 0x1_0000 block, 0x0004_0000 block, 0x00C_0000 block, 0x0020_0000 block
What should I deal with lowEnabledBlocks, midEnabledBlocks, highEnabledBlock Parameters
MPC5644A flash memory
FlashErase Function
Solved! Go to Solution.
No, it is not. With using of SSD driver, user uses logical address mapping. midEnabledBlock has only 2 bits.
I tried to erase Flash memory '0x3_0000~ 40_0000' to use Function 'pFlashErase' (0x0000~0x3_0000 is Bootloader)
I set
lowEnabledBlocks = 0xE00 = 0b1110_0000_0000
midEnabledBlocks = 0x3 = 0b11
highEnabledBlock = 0x3F = 0b11_1111
but the area '0x4_0000~0x6_0000' and 0x3F_0000..' is not erased..(check it by trace32)
I tried again
lowEnabledBlocks = 0xFFFF_FFFF
midEnabledBlocks = 0xFFFF_FFFF
highEnabledBlock = 0xFFFF_FFFF
and the area '0x4_0000~0x6_0000' and 0x3F_0000..' is erased exactly.
What is the problem??
Thank you for your help
I have just it and it works normally to me.
lowEnabledBlocks = 0x0E00 followed by erase sequence erases 0x0003_0000-0x0007_FFFF
I don't see any issue.
Thank you very much
it works well
Yes, it is right if you mean physical to logical address mapping.
Only I would note that the logical block is being selected by logic 1 in the particular bit-mapped position.
midEnabledBlock is L0 and M0 of Flash B??
As you say, midEnabledBlock is just 2 bit ??
but in Datasheet MPC5644A
High-Address Space Block Select Register is 10bit
Mid-Address Space Block Select Register is 2bit
Low-Address Space Block Select Register is 6bit
is this not relevant????
No, it is not. With using of SSD driver, user uses logical address mapping. midEnabledBlock has only 2 bits.