Hi,
When using a 10-pin, 0.050" pitch ARM cortex debug connector for JTAG/SWD access to the target, should the nRESET signal (pin 10) connect to the "system wide" reset (i.e. that which connects to the "POR" pin of the MCU, and most likely other places too), or should it connect to the dedicated JTAG_TRSTB pin of the MCU?
thanks!
-Nick
Hi,
For the image you attached, it seems you are likely to be using SWD.
When using SWD, pin 10 or nRESET should be connected to your main RESET line (or system wide reset, as you are telling).
It seems that JTAG_TRSTB is mainly for the JTAG interface itself, not to RESET the MCU.
Hopefully, this helps with your question.
thanks @Daniel-Aguirre
Actually we are using JTAG, not SWD.
1. What should pin 10 of the connector be connected to?
2. What should the JTAG_TRSTB pin of the IMXRT be connected to?
thanks!
In that case, the following should be correct:
1. The nRESET signal still needs to be connected to the system wide RESET.
2. JTAG_TRSTB on the IMX should be left unconnected due to the lack of nTRST signal of the JTAG connector.
Coming back to your specific case, 10-pin JTAG/SWD does not have the nTRST signal, so JTAG_TRSTB is to left unconnected. Seems that the JTAG interface in the IMXRT1060 has an internal pull-up resistor, so this should be OK.
Still, we do recommend to contact your NXP representative for a better support.
Hi nickwallis
Please let us know your chip part number thus we can assign right engineer for your question.
Thanks,
Jun Zhang