I'm using a custom board based on ls1021atwr and I need to configure a synchronous serial port using uc3 pins along with brg01 and clk11.
I found a node in the dtsi file for uart3 as such:
uart3: serial@21d0600 {
compatible = "fsl,16550-FIFO64", "ns16550a";
reg = <0x0 0x21d0600 0x0 0x100>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <0>;
fifo-size = <15>;
status = "disabled";
};
These are my queries:
is uart3 the same as uc3?
also where can I find a driver for uc3 pins?
Should I add a node for uc3 in dts?
And finally, I know that the compatible keyword gives us the driver file for the node but I cant find any file named fsl_16550-FIFO64.c or ns16550a.c does that mean uart3 doesn't have any driver?
Thanks in advance.
UC3 is UCC UART, UCC3 assigned to /dev/ttyQE1
Please refer to the general setting in dts file
serial: ucc@2200 {
device_type = "serial";
compatible = "ucc_uart";
port-number = <1>;
rx-clock-name = "brg2";
tx-clock-name = "brg2";
};
Please refer to UCC UART driver in drivers/tty/serial/ucc_uart.c.
Please refer to https://community.nxp.com/t5/Layerscape/LS102x-QUICC-UCC-UART/m-p/656859
Multi-channel controller on UCC(UMCC) is supported with only the HDLC and transparent mode. You could refer to the following dts definition.
&uqe {
ucc_hdlc: ucc@2000 {
compatible = "fsl,ucc-hdlc";
rx-clock-name = "clk8";
tx-clock-name = "clk9";
fsl,rx-sync-clock = "rsync_pin";
fsl,tx-sync-clock = "tsync_pin";
fsl,tx-timeslot-mask = <0xfffffffe>;
fsl,rx-timeslot-mask = <0xfffffffe>;
fsl,tdm-framer-type = "e1";
fsl,tdm-id = <0>;
fsl,siram-entry-id = <0>;
fsl,tdm-interface;
};
};
Thank you for the clarification,
Just wanted to know if these ports support sdlc? how do I go about configuring/enabling the same?
SDLC is not supported.
I see, what do you think of this?
https://community.nxp.com/t5/Qonverge/Configure-UCC-in-SDLC-mode-in-MPC8309/m-p/552200