ATF -> Uboot (ls1043ardb, ls1043argw)

endrunner_smw · ‎11-19-2021

I have two devices:

LS1043ARDB
LS1043ARGW

I am able to build rcw, atf, and uboot for an sdcard and boot(sd) a mainline kernel and a custom filesystem on the ls1043ardb.

I then created duplicate files to be modified for ls1043argw.

I utilized the information in this post to get DDR timings and get RCW to validate:
Solved: Re: LS1043ARGW SD TFA boot problem - NXP Community

I then built the newly customized versions of rcw, atf, and uboot for ls1043argw.

In the TFA bootflow the ls1043argw is hanging in BL31 where it is suppose to hand over control to BL33(Uboot), but Uboot never starts.

I don't have code warrior or a JTAG tap.

What would be more likely...that atf is misconfigured and not properly pointing at Uboot(which I'm pretty sure it's correct currently), or that Uboot is failing to start/initialize?

I should add I'm using:

endrunner_smw · ‎11-22-2021

Hello @yipingwang,

If I comment out the dq_mapping[...] values from ddr_init.c that I used from post Solved: Re: LS1043ARGW SD TFA boot problem - NXP Community then booting fails earlier with

INFO:    RCW BOOT SRC is SD/EMMC
INFO:    RCW BOOT SRC is SD/EMMC
INFO:    esdhc_emmc_init
INFO:    Card detected successfully
INFO:    init done:
INFO:    time base 292 ms
NOTICE:  Fixed DDR on board
INFO:    Time after parsing SPD 4 ms
INFO:    Time before programming controller 8 ms

NOTICE:  4 GB DDR4, 32-bit, CL=11, ECC off
INFO:    Time used by DDR driver 18 ms
NOTICE:  BL2: v1.5(debug):LSDK-19.09-update-311219
NOTICE:  BL2: Built : 10:39:58, Nov 22 2021
INFO:    Configuring TZASC-380
INFO:    BL2: Doing platform setup
INFO:    BL2: Loading image id 3
INFO:    sd-mmc read done.
WARNING: Firmware Image Package header check failed.
WARNING: Failed to obtain reference to image id=3 (-2)
ERROR:   BL2: Failed to load image (-2)
Authentication failure

If I keep the dq_mapping values then I at least get to BL31, but never to BL33(Uboot)

yipingwang · ‎11-23-2021

LS1043ARGW integrates the same type DDR as LS1043ARDB.

Please try to use atf/plat/nxp/soc-ls1043/ls1043ardb/ddr_init.c directly without modification.

endrunner_smw · ‎11-23-2021

Same output

INFO:    RCW BOOT SRC is SD/EMMC
INFO:    RCW BOOT SRC is SD/EMMC
INFO:    esdhc_emmc_init
INFO:    Card detected successfully
INFO:    init done:
INFO:    time base 304 ms
NOTICE:  Fixed DDR on board
INFO:    Time after parsing SPD 5 ms
INFO:    Time before programming controller 9 ms

NOTICE:  2 GB DDR4, 32-bit, CL=11, ECC off
INFO:    Time used by DDR driver 19 ms
NOTICE:  BL2: v1.5(debug):LSDK-19.09-update-311219
NOTICE:  BL2: Built : 08:28:22, Nov 23 2021
INFO:    Configuring TZASC-380
INFO:    BL2: Doing platform setup
INFO:    BL2: Loading image id 3
INFO:    sd-mmc read done.
WARNING: Firmware Image Package header check failed.
WARNING: Failed to obtain reference to image id=3 (-2)
ERROR:   BL2: Failed to load image (-2)
Authentication failure

yipingwang · ‎11-24-2021

Please check your RCW configuration file whether the following PBI commands are applied.

#include <../ls1043aqds/cci_barrier_disable.rcw>
#include <../ls1043aqds/a009929.rcw>
#include <../ls1043aqds/usb_phy_freq.rcw>
#include <../ls1043aqds/uboot_address.rcw>
#include <../ls1043aqds/a009859.rcw>

endrunner_smw · ‎11-25-2021

The following files are not in the source tree located at
https://source.codeaurora.org/external/qoriq/qoriq-components/rcw/tree/ls1043aqds

../ls1043aqds/a009929.rcw
../ls1043aqds/a009859.rcw

The includes I have are the following:

../ls1043aqds/ls1043a.rcwi (beginning of file)
../ls1043aqds/atf_address.rcw (end of file)
../ls1043aqds/cci_barrier_disable.rcw (end of file)
../ls1043aqds/usb_phy_freq.rcw (end of file)

Is that source tree missing files? Would you happen to have those files?

yipingwang · ‎11-25-2021

It seems that your didn't use the latest source code.

After git clone rcw, atf and u-boot source code, please run the following command to switch to LSDK-21.08 branch.

$ git checkout -b LSDK-21.08 LSDK-21.08

endrunner_smw · ‎11-30-2021

I have redownloaded

I made sure to change the branch with: git checkout -b LSDK-21.08 LSDK-21.08
for all three repositories.

I can now use the ddr_init.c in ATF without modification

My RCW(rcw_1600_sdboot.rcw) is the following:

#include <../ls1043aqds/ls1043a.rcwi>

SYS_PLL_RAT=4
/* SYS_PLL_RAT=3 */
MEM_PLL_RAT=16
CGA_PLL1_RAT=16
/* CGA_PLL1_RAT=14 */
CGA_PLL2_RAT=10
/* CGA_PLL2_RAT=12 */
SRDS_PRTCL_S1=5205
FM1_MAC_RAT=1
SRDS_PLL_REF_CLK_SEL_S1=2
SRDS_DIV_PEX=1
DDR_FDBK_MULT=2
/* DDR_REFCLK_SEL=1 */
PBI_src=6
IFC_MODE=64
/* IFC_MODE=262 */
HWA_CGA_M1_CLK_SEL=6
DRAM_LAT=1
SYS_PLL_SPD=1
IRQ_EXT=1
/* UART_BASE=7 */
UART_BASE=6
IRQ_OUT=1
IRQ_BASE=80
EC1=1
EC2=1
/* TVDD_VSEL=0 */
TVDD_VSEL=1
DVDD_VSEL=2
/* EVDD_VSEL=2 */
EVDD_VSEL=0
/* IIC2_EXT=0 */
/* IIC2_EXT=4 */
IIC2_EXT=5
SYSCLK_FREQ=600
HWA_CGA_M2_CLK_SEL=1

/* #include <../ls1043aqds/atf_address.rcw> */
#include <../ls1043aqds/cci_barrier_disable.rcw>
#include <../ls1043aqds/a009929.rcw>
#include <../ls1043aqds/usb_phy_freq.rcw>
#include <../ls1043aqds/uboot_address.rcw>
/* #include <../ls1043aqds/a009859.rcw> */

If I include ../ls1043aqds/a009859.rcw currently then power on RCW test does not pass and SLEEP LED remains ON.

I am still getting into BL31, but unable to get to BL33(U-boot).

My log is the following:

INFO:    SoC workaround for Errata A008850 Early-Phase was applied
INFO:    SoC workaround for Errata A009660 was applied
INFO:    SoC workaround for Errata A010539 was applied
INFO:    RCW BOOT SRC is SD/EMMC
INFO:    SoC workaround for DDR Errata A009942 was applied
INFO:    SoC workaround for DDR Errata A009663 was applied
INFO:    time base 0 ms
NOTICE:  Fixed DDR on board
INFO:    Time after parsing SPD 4 ms
INFO:    Time before programming controller 8 ms

NOTICE:  2 GB DDR4, 32-bit, CL=11, ECC off
INFO:    Time used by DDR driver 18 ms
INFO:    SoC workaround for Errata A008850 Post-Phase was applied
INFO:    RCW BOOT SRC is SD/EMMC
INFO:    esdhc_emmc_init
INFO:    Card detected successfully
INFO:    init done:
NOTICE:  BL2: v2.4(debug):LSDK-21.08-0-g340b20bcb
NOTICE:  BL2: Built : 15:29:24, Nov 30 2021
INFO:    Configuring TrustZone Controller tzc380
INFO:    BL2: Doing platform setup
INFO:    BL2: Loading image id 3
INFO:    sd-mmc read done.
INFO:    sd-mmc read done.
INFO:    sd-mmc read done.
INFO:    Loading image id=3 at address 0xfbe00000
INFO:    sd-mmc read done.
INFO:    Image id=3 loaded: 0xfbe00000 - 0xfbe0f63d
INFO:    BL2: Loading image id 5
INFO:    sd-mmc read done.
INFO:    sd-mmc read done.
INFO:    sd-mmc read done.
INFO:    sd-mmc read done.
INFO:    sd-mmc read done.
INFO:    Loading image id=5 at address 0x82000000
INFO:    sd-mmc read done.
INFO:    Image id=5 loaded: 0x82000000 - 0x820c8e1c
NOTICE:  BL2: Booting BL31
INFO:    Entry point address = 0xfbe00000
INFO:    SPSR = 0x3cd
NOTICE:  BL31: v2.4(debug):LSDK-21.08-0-g340b20bcb
NOTICE:  BL31: Built : 15:30:00, Nov 30 2021
NOTICE:  Welcome to ls1043argw BL31 Phase
INFO:    ARM GICv2 driver initialized
INFO:    BL31: Initializing runtime services
INFO:    BL31: cortex_a53: CPU workaround for 855873 was applied
INFO:    BL31: cortex_a53: CPU workaround for 1530924 was applied
INFO:    BL31: Preparing for EL3 exit to normal world
INFO:    Entry point address = 0x82000000
INFO:    SPSR = 0x3c9

Additionally, shouldn't boot log show 4GB of DDR4 instead of 2GB for LS1043A-RGW?

Further troubleshooting recommendations?

jm11 · ‎05-17-2023

Just in case anyone has the same problem...

I got to the same point as you. BL31 was finishing, but there was no serial console output from U-Boot.

It turns out U-Boot was stuck in an early init phase, where it was trying to load environment variables from flash. This failed so U-Boot entered a hang() function. I think U-Boot was trying to load the variable to tell it where to print the console.

I added the following lines to the configs/ls1043axxx_tfa_defconfig file in the u-boot-qoriq recipe:

https://github.com/nxp-qoriq/u-boot/blob/181859317bfafef1da79c59a4498650168ad9df6/configs/ls1043ardb...

CONFIG_ENV_IS_NOWHERE=y
CONFIG_ENV_OVERWRITE=n
CONFIG_ENV_IS_IN_FLASH=n
CONFIG_ENV_IS_IN_MMC=n
CONFIG_ENV_IS_IN_NAND=n

This means that U-Boot uses the fixed environment variables, which are determined at compile time. I can now get to the U-Boot prompt.

yipingwang · ‎12-01-2021

For SD boot, please use the following PBI commands in rcw_1600_sdboot.rcw

#include <../ls1043aqds/atf_address.rcw>
#include <../ls1043aqds/cci_barrier_disable.rcw>
#include <../ls1043aqds/a009929.rcw>
#include <../ls1043aqds/usb_phy_freq.rcw>

endrunner_smw · ‎12-01-2021

I have set the following commands in rcw_1600_sdboot.rcw

#include <../ls1043aqds/atf_address.rcw>
#include <../ls1043aqds/cci_barrier_disable.rcw>
#include <../ls1043aqds/a009929.rcw>
#include <../ls1043aqds/usb_phy_freq.rcw>

Still getting stuck in BL31 when switching to BL33(U-boot).

I increased the verbosity of my bootlog. Attaching bootlog to post.

yipingwang · ‎12-02-2021

I didn't find abnormal information in your verbose log, it seems that ATF is executed successfully.

Probably the system is getting stuck at the begging of u-boot.

If you don't have debug tool to debug atf/u-boot. You need to add more print information in ATF/u-boot source code to check where it gets stuck.

endrunner_smw · ‎02-05-2022

For the moment I disabled debug mode and put in my own print statements in ATF

NOTICE:  Fixed DDR on board

NOTICE:  2 GB DDR4, 32-bit, CL=11, ECC off
NOTICE:  BL2: v2.4(release):LSDK-21.08-0-g340b20bcb
NOTICE:  BL2: Built : 12:56:27, Jan 11 2022
NOTICE:  BL2: Booting BL31
NOTICE:  BL31: v2.4(release):LSDK-21.08-0-g340b20bcb-dirty
NOTICE:  BL31: Built : 14:15:41, Feb  4 2022
NOTICE:  Welcome to ls1043argw BL31 Phase
NOTICE:  bl31_main.c in function bl31_prepare_next_image_entry, TOP OF
NOTICE:  Dupe: BL31: Preparing for EL3 exit to normal world
NOTICE:  Dupe: Entry point address = 0x82000000
NOTICE:  Dupe: SPSR = 0x3c9
NOTICE:  Argument $0 = 0x0
NOTICE:  Argument $1 = 0x0
NOTICE:  Argument $2 = 0x0
NOTICE:  Argument $3 = 0x0
NOTICE:  Argument $4 = 0x0
NOTICE:  Argument $5 = 0x0
NOTICE:  Argument $6 = 0x0
NOTICE:  Argument $7 = 0x0
NOTICE:  context_mgmt.c about to call: cm_set_next_eret_context(security_state)
NOTICE:  context_mgmt.c in function cm_set_next_eret_context(security_state)
NOTICE:  context_mgmt.c in function cm_set_next_eret_context(security_state), about to set ctx = cm_get_context(security_state)
NOTICE:  context_mgmt.c in function cm_set_next_eret_context(security_state), SET ctx = cm_get_context(security_state)
NOTICE:  context_mgmt.c in function cm_set_next_eret_context(security_state), assert successful, about to call: cm_set_next_context(ctx)
NOTICE:  context_mgmt.h in function cm_set_next_context.
NOTICE:  context_mgmt.h END OF cm_set_next_context.
NOTICE:  context_mgmt.c in function cm_set_next_eret_context(security_state), END OF cm_set_next_eret_context function.
NOTICE:  context_mgmt.c in function cm_prepare_el3_exit, END OF cm_prepare_el3_exit.
NOTICE:  bl31_main.c in function bl31_prepare_next_image_entry, END OF bl31_prepare_next_image_entry.
NOTICE:  bl31_main.c in function bl31_main, just returned from bl31_prepare_next_image_entry, about to flush console.
NOTICE:  bl31_main.c in function bl31_main, console flushed, about to call bl31_plat_runtime_setup.
NOTICE:  plat/nxp/common/setup/ls_bl31_setup.c, about to call function soc_runtime_setup.
NOTICE:  bl31_main.c END OF bl31_main

Once bl31_main completes what happens next? Does ATF have more processing it does or is it suppose to be U-boot from there?

endrunner_smw · ‎11-26-2021

I will have to test this after the holiday weekend. It does seem that I was using the base repository and not a specific branch (LSDK21.08).

I did get a new copy of the rcw with git clone and then switch the branch to LSDK21.08 and those 2 files do appear to be listed. I don't have the equipment on hand currently, so I will try this different version when I return to the office.

yipingwang · ‎11-22-2021

LS1043ARGW integrates the same type DDR and IFC NAND flash as LS1043ARDB.

When building ATF image for LS1043ARGW, please use the DDR timing setting in atf/plat/nxp/soc-ls1043/ls1043ardb/ddr_init.c, no need to modify it.

If your problem remains, please provide your console log.

endrunner_smw · ‎11-22-2021

Hello @yipingwang,

If I comment out the dq_mapping[...] values from ddr_init.c that I used from post Solved: Re: LS1043ARGW SD TFA boot problem - NXP Community then booting fails earlier with

INFO:    RCW BOOT SRC is SD/EMMC
INFO:    RCW BOOT SRC is SD/EMMC
INFO:    esdhc_emmc_init
INFO:    Card detected successfully
INFO:    init done:
INFO:    time base 292 ms
NOTICE:  Fixed DDR on board
INFO:    Time after parsing SPD 4 ms
INFO:    Time before programming controller 8 ms

NOTICE:  4 GB DDR4, 32-bit, CL=11, ECC off
INFO:    Time used by DDR driver 18 ms
NOTICE:  BL2: v1.5(debug):LSDK-19.09-update-311219
NOTICE:  BL2: Built : 10:39:58, Nov 22 2021
INFO:    Configuring TZASC-380
INFO:    BL2: Doing platform setup
INFO:    BL2: Loading image id 3
INFO:    sd-mmc read done.
WARNING: Firmware Image Package header check failed.
WARNING: Failed to obtain reference to image id=3 (-2)
ERROR:   BL2: Failed to load image (-2)
Authentication failure

If I keep the dq_mapping values then I at least get to BL31, but never to BL33(Uboot)

INFO: RCW BOOT SRC is SD/EMMC
INFO: RCW BOOT SRC is SD/EMMC
INFO: esdhc_emmc_init
INFO: Card detected successfully
INFO: init done:
INFO: time base 291 ms
NOTICE: Fixed DDR on board
INFO: Time after parsing SPD 5 ms
INFO: Time before programming controller 8 ms

NOTICE: 4 GB DDR4, 32-bit, CL=11, ECC off
INFO: Time used by DDR driver 19 ms
NOTICE: BL2: v1.5(debug):LSDK-19.09-update-311219
NOTICE: BL2: Built : 12:12:37, Nov 22 2021
INFO: Configuring TZASC-380
INFO: BL2: Doing platform setup
INFO: BL2: Loading image id 3
INFO: sd-mmc read done.
INFO: sd-mmc read done.
INFO: sd-mmc read done.
INFO: Loading image id=3 at address 0xfbe00000
INFO: sd-mmc read done.
INFO: Image id=3 loaded: 0xfbe00000 - 0xfbe0d644
INFO: BL2: Loading image id 5
INFO: sd-mmc read done.
INFO: sd-mmc read done.
INFO: sd-mmc read done.
INFO: sd-mmc read done.
INFO: sd-mmc read done.
INFO: Loading image id=5 at address 0x82000000
INFO: sd-mmc read done.
INFO: Image id=5 loaded: 0x82000000 - 0x820c9550
NOTICE: BL2: Booting BL31
INFO: Entry point address = 0xfbe00000
NOTICE: BL31: v1.5(debug):LSDK-19.09-update-311219
NOTICE: BL31: Built : 12:13:09, Nov 22 2021
NOTICE: Welcome to LS1043 BL31 Phase
INFO: ARM GICv2 driver initialized
INFO: BL31: Initializing runtime services
WARNING: BL31: cortex_a53: CPU workaround for 835769 was missing!
WARNING: BL31: cortex_a53: CPU workaround for 843419 was missing!
INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
INFO: BL31: Preparing for EL3 exit to normal world
INFO: Entry point address = 0x82000000
INFO: SPSR = 0x3c9

JPRaja · ‎10-27-2022

Hello All,

Is this issue resolved ?

Because I'm also getting the same issue but in different scenario.

Currently, I'm working on S32G2 RDB2 based custom board. There I'm trying to load the Linux image (ATF+UBoot+Kernel+FS) from flash memory.

Software: BSPv33 (Yocto)

But it's stuck in ATF level, Uboot is not loading.

NOTICE: Reset status: Power-On Reset
NOTICE: Reset status: Power-On Reset
INFO: s32_i2c_wait: timeout state=2
INFO: s32_i2c_wait: timeout state=2
INFO: s32_i2c_wait: timeout state=2
INFO: s32_i2c_wait: timeout state=2
ERROR: read error from device: 0x34342808 register: ERROR: Failed to disable VR5510 watchdog
NOTICE: BL2: v2.5(debug):bsp33.0-2.5-dirty
NOTICE: BL2: Built : 14:01:09, Jun 15 2022
INFO: BL2: Doing platform setup
INFO: BL2: Loading image id 0
INFO: Loading image id=0 at address 0x34400000
INFO: Image id=0 loaded: 0x34400000 - 0x34400200
INFO: BL2: Loading image id 3
INFO: Loading image id=3 at address 0xff800000
INFO: Image id=3 loaded: 0xff800000 - 0xff82ff5d
INFO: BL2: Loading image id 5
INFO: Loading image id=5 at address 0xffaa0000
INFO: Image id=5 loaded: 0xffaa0000 - 0xffb42c50
Warning: Instruction at BL33_ENTRYPOINT (0xffaa0000) is 0x1f140000, which is not a B or BL!
INFO: BL2: Skip loading image id -1
NOTICE: BL2: Booting BL31
INFO: Entry point address = 0xff800000
INFO: SPSR = 0x3cd

But the same ".sdcard" image is booting fine from eMMC.

I have noticed some difference in the end addresses and also getting below warning,

Warning: Instruction at BL33_ENTRYPOINT (0xffaa0000) is 0x1f140000, which is not a B or BL!

What may be the issue? How to resolve it? Any idea? Any suggestions?

yellapu_anishkh · ‎01-18-2023

Hi JPRaja,
I am facing similar issue, device booting from emmc but uboot commands are not working, but from nor it got stuck at atf with similar command

JPRaja · ‎01-19-2023

Hi @yellapu_anishkh ,

I don't know whether you also using Hyperflash memory on S32G board.

However, I have resolved this issue when reducing the QSPI clk frequency from 200MHz to 50MHZ in ATF.

#define S32GEN1_QSPI_CLK_FREQ (200 * MHZ)

to

#define S32GEN1_QSPI_CLK_FREQ (50 * MHZ)

in, include/dt-bindings/clock/s32gen1-clock-freq.h

Now I'm getting UBoot prints on console.

huangcm · ‎01-14-2024

hi JPRaja. my board flash is IS25WP512M and include/dt-bindings/clock/ can't find relative defines

yellapu_anishkh · ‎01-19-2023

Hi Raja;

For me also , QSPI issue resolved after changing frequency,but issue is on both emmc and nor, u-boot commands are not working. including help command.

ATF -> Uboot (ls1043ardb, ls1043argw)

ATF -> Uboot (ls1043ardb, ls1043argw)

QorIQ LS1 Devices