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OpenWrt is a highly extensible GNU/Linux distribution for embedded devices (typically wireless routers), OpenWrt is built from the ground up to be a full-featured, easily modifiable operating system for your router. LEDE is based on OpenWrt, targeting a wide range of wireless SOHO routers and non-network device. This document introduces how to porting and running OpenWrt/LEDE on QorIQ LS1012/LS1043 platform. 1. Porting OpenWrt/LEDE Source on QorIQ Layerscape Platforms 2. Deploy OpenWrt/LEDE Images to Boot up the System 3. Verify VLAN Interface and PFE in LEDE System
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This document introduces porting TDM Linux driver working in internal loopback mode to do verification during custom boards bringing up and verification stage. 1. TDM Interface Configuration to Support Internal Loopback Mode 2. Modify Linux Kernel Driver to Make TDM Working in Internal Loopback Mode 3. Build TDM Driver into Linux Kernel and do verification on the target board
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The integrated flash controller (IFC) is used to interface with external asynchronous/synchronous NAND flash, asynchronous NOR flash, SRAM, generic ASIC memory and EPROM. This document introduces how to configure IFC controller on QorIQ LS, T and P series custom boards, uses LS1043 custom board integrating NAND Flash MT29F64G08CBCBBH1 as an example to demonstrate IFC flash timing parameters calculation and control registers configuration, CodeWarrior initialization file customization and u-boot source code porting. 1. IFC Memory Mapped Registers Introduction 2. Calculate IFC Flash Timing Values and Configure Control Registers 3. Customize CodeWarrior Initialization File with the Calculated IFC Timing 4. Porting U-BOOT Source with the Calculated IFC Timing
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This document introduces a method to separate control plane and data plane between GPP(ARM) and AIOP based on different L4 protocols implemented in the AIOP software. So far, in the current MC version, this scenario could not be implemented from WRIOP using DPDMUX, so it is a good choice for users to separate the traffic in AIOP.   1. Basic Concept of DPAA2 Objects   2. AIOP Application to Implement Control in ARM and Data Plane in AIOP   3. Build AIOP Application Project with CodeWarrior   4. Running AIOP Application Program on LS2085ARDB
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The u-boot in SDK2.0 has a bug on SGMII2.5 support. Need to add the patch.
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This document introduces how to configure RCW to support GPIO on LS1043 platform, how to configure Linux Kernel to load Linux GPIO driver to access GPIO from SYSFS and using loopback method to do verification on the target board. RCW configuration to support GPIO Configure GPIO driver in Linux Kernel Verify GPIO on the target board
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This file shows up LS1024A GMAC2 debug, no software support in barebox only workable in kernel. and If using RTL Phy need to add TX_CLK and RX_CLK delay.
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This Documentation shows how to make a mass production NAND Flash image for QorIQ IFC NAND flash interface by external NAND Flash programmer.
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The attached patch is to support Aquantia AQR107 in LS1043A.
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The attached patch is to support DDR3L in LS1043A. The SDK version is Linux-LS1043A-SDK-V0.5-SOURCE-20151223-yocto.iso. Not SDK2.0. The DDR3L part number is two Winbond W632GU6KB(16M x 8 banks x 16 bits DDR3L SDRAM).
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On LS2085 platform, the basic networking product performs autonomous IP forwarding and IPSEC on the AIOP, data path functions run mostly independent of the GPP software and only involve GPP when necessary. NADK(Network Acceleration Development Kit) is a complete user space development kit for networking applications. This IPSEC application is implemented in Linux user space using NADK framework, this application learns the Linux configuration through the netlink event notification and sends the configuration to AIOP DP using the respective NF APIs. The application invokes NF APIs to send configuration details to IPsec data path on the AIOP. 1. Overview and Architecture of the AIOP-NADK Based IPSEC Application 2. NADK Based GPP Listener Program Design 2.1 NADK APIs Introduction Used in the Application 2.2 Packet Processing in Multiple Threads Mode NADK Application 2.3 IPSEC XFRM Events monitored by the Listener 3. IPSEC Application communicates with AIOP through NF APIs 3.1 IPSEC provided features implemented at AIOP 3.2 IPSEC NF APIs Used to Configure AIOP 3.3 The process of add SPD policy in the IPSEC Application 4. Setup Networking Environment to Verify the IPSEC application
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1. Bootflow Overview of LS2 2. U-BOOT Workflow for LS2085 3. LS2085QDS configuration and Initialization in U-BOOT
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Currently rate limiting is supported on TX side only via IOCTL call FM_PORT_IOC_SET_RATE_LIMIT. A user-space application has to be implement which opens the character driver interface of the TX port and issue the IOCTL. The rate_limit structure (mentioned below) has to be filled to implement the restriction.   For example:   fd = open ("/dev/fm0_port_tx5", O_RDWR);   err = ioctl(fd, FM_PORT_IOC_SET_RATE_LIMIT, &fm_port);   Structure to pass to the IOCTL: /**************************************************************************//** @Description@@   A structure for defining Tx rate limiting (Must match struct t_FmPortRateLimit defined in fm_port_ext.h) *//***************************************************************************/ typedef struct ioc_fm_port_rate_limit_t { uint16_t max_burst_size;         /**< in KBytes for Tx ports, in frames for offline parsing ports. (note that for early chips burst size is rounded up to a multiply of 1000 frames).*/     uint32_t rate_limit; /**< in Kb/sec for Tx ports, in frame/sec for offline parsing ports. Rate limit refers to data rate (rather than line rate). */ ioc_fm_port_dual_rate_limiter_scale_down rate_limit_divider; /**< For offline parsing ports only. Not-valid for some earlier chip revisions */ } ioc_fm_port_rate_limit_t; Further information in the below link. http://www.freescale.com/infocenter/index.jsp?topic=%2FQORIQSDK%2F2283674.html
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