Problem executing from SDRAM when running at 204Mhz (Hitex Eval board)

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Problem executing from SDRAM when running at 204Mhz (Hitex Eval board)

685 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by larsjep on Wed Oct 10 05:45:55 MST 2012
Hi,

I have for some time been trying to run my application from SDRAM with the LPC4350 core running at 204MHhz.
But it kept going into hard fault.

I have now been able to isolate what triggers the problem and build a little example that shows the problem.
The problem is that memory writes sometimes goes to incorrect addresses (wrong bank/row).

My example is based on the BOOTFAST example from the PDL.


Here is a description of what the program does.

The program contains a couple of function located at different location in SDRAM. (It seems like that the functions must be located in different banks to trigger the problem)
The main function is do_test() that calls the other functions and validates that a certain address in SDRAM hasn't been changed.

func2(): returns a pointer that points to the address 0x28235E54
func1(): Calls func2() and writes to the returned address (the value 17).


do_test() writes a value to address 0x28605654, and then calls func2()/func1() in a loop.
The data at address 0x28605654 should never change, but suddenly the address contains 17.

When the error is detected do_test() stops at an infinite loop.
The loopCount variable can then be inspected to see how many times the loop has runned before the overwrite occured.


The tools I have used is Keil uVision V4.23.00.0 and a ULink Pro debugger.

The problem seems to be related to the temperature of the SDRAM chip. If I cool down the SDRAM the problem disappears.

I have tested it on 3 different Hitex boards.
The 2 boards fails at normal room temperature, but the thirds only fails when the SDRAM is heated up (About 10-20 degress).


I have attached the example project.


Best regards
  Lars

Original Attachment has been moved to: SDRAM_Execute_204Mhz.zip

Labels (1)
0 Kudos
Reply
3 Replies

609 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by larsjep on Wed Oct 17 12:11:41 MST 2012
Hi,

I can now confirm my fear.
Your changes doesn't remove the problem, it just moves the problem.
If I change the location of the functions the problem occurs again.

I have attached the modified files.

Best regards
  Lars
0 Kudos
Reply

609 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by larsjep on Tue Oct 16 07:54:55 MST 2012
Hi,

I'm sorry but I don't think this solves the problem.
I can see that you have changed the address mapping mode from (Bank, Row, Column) to (Row, Bank, Column)
When you do this the functions must be placed on different addresses to trig the problem.
I know this because my original application actully uses this addressing mode.

I havn't testet it yet, but tomorrow I will try to move the functions to the other addresses and see what happens.

If you would like to modifiy the example yourself you can see the other addresses below.

Best regards
  Lars

---------------------------------------------------------
Address high performance mode: 0x2800AC94
bank = 0x2, row = 0x015, column = 0x094
Address normal mode: 0x28402A94

Address high performance mode: 0x2800BA00
bank = 0x1, row = 0x017, column = 0x000
Address normal mode: 0x28202E00

Address high performance mode: 0x28015EEC
bank = 0x3, row = 0x02B, column = 0x0EC
Address normal mode: 0x286056EC

Address high performance mode: 0x28015E54
bank = 0x3, row = 0x02B, column = 0x054
Address normal mode: 0x28605654

Address high performance mode: 0x280D7A54
bank = 0x1, row = 0x1AF, column = 0x054
Address normal mode: 0x28235E54

0 Kudos
Reply

609 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by bavarian on Tue Oct 16 07:18:59 MST 2012
Hello Lars,

I've checked your code and I was able to reproduce the problem.
At 192MHz everything worked fine, but at 204MHz there were errors.

I corrected the EMC settings and the SDRAM initialization so that it fits better to the SDRAM type on the Hitex board.
The attached project can be unzipped into the existing release and will overwrite some files.
If you still see problems please come back to us, don't waste your time for something which we should correct ;-)

If you want to learn more about SDRAM in combination with our controller please download the following app note:

http://www.lpcware.com/content/nxpfile/an10935-using-sdrddr-sdram-memories-lpc32xx

Regards,
NXP Technical Support Team
0 Kudos
Reply