[LPC54S018]SPIFI Pin, Fault is generated when IOCON setting change.

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[LPC54S018]SPIFI Pin, Fault is generated when IOCON setting change.

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397件の閲覧回数
PaoloFalduto
NXP Employee
NXP Employee

A fault is generated when I try to change a IOCON settings of following pins:

  • PIO0_23
  • PIO0_24
  • PIO0_25
  • PIO0_26
  • PIO0_27
  • PIO0_28

Below you can see the part of the code that generate an error, or sometimes also a stuck.

PaoloFalduto_1-1723736543444.png

 

void main(void) {



uint32_t regValue;



/* Init board hardware. */

 BOARD_InitBootPins();

 BOARD_InitBootClocks();

 BOARD_InitBootPeripherals();

#ifndef BOARD_INIT_DEBUG_CONSOLE_PERIPHERAL

/* Init FSL debug console. */

 BOARD_InitDebugConsole();

#endif



 IOCON->PIO[0][23] = 256;

 IOCON->PIO[0][24] = 256;

 IOCON->PIO[0][25] = 256;

 IOCON->PIO[0][26] = 256;

 IOCON->PIO[0][27] = 256;

 IOCON->PIO[0][28] = 256;



gpio_pin_config_t DUT_SYNCDAC_config = {

 .pinDirection = kGPIO_DigitalOutput,

 .outputLogic = 0U

 };

/* Initialize GPIO functionality on pin PIO0_28 (pin M9) */

 GPIO_PinInit(GPIO, 0U , 28U, &DUT_SYNCDAC_config);

 

This error doesn't appear and all the FW works if select Link Applciation to RAM and run the code in debug mode. Why?

 

PaoloFalduto_0-1723736393657.png

 

 

 

 

 

 

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348件の閲覧回数
PaoloFalduto
NXP Employee
NXP Employee

Resolved! In this way!

 

PaoloFalduto_0-1723903425718.png

 

Plain load image is the solution to release the external FLASH.

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372件の閲覧回数
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

This is spifi flash hardware circuit.

xiangjun_rong_0-1723791254468.png

As you can see that P0_23, P0_24, P0_25, P0_26, P0_27, P0_28 pins function as SPIFI module pins, the LPC54018 does not have on-chip flash, for each instruction, it reads code from the spifi flash via above pins and execute. When you configure above pins in GPIO or whatever, the binary code reading from spifi flash is incorrect, when the wrong binary code is executed, a hardware fault will happen.

In conclusion, you can not configure the P0_23, P0_24, P0_25, P0_26, P0_27, P0_28 pins in application code.

Hope it can help you

BR

XiangJun Rong

 

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PaoloFalduto
NXP Employee
NXP Employee

Hi, 

 

Thanks for the answer, I already know the architecture of LPC54S018. But It's still strange to me.

The Flash is used to store the binary FW, but at the boot of MCU the binary should be loaded on the MCU RAM and at the end of the boot the microcontroller should release the FLASH

Am I wrong?

 

Thank you!

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349件の閲覧回数
PaoloFalduto
NXP Employee
NXP Employee

Resolved! In this way!

 

PaoloFalduto_0-1723903425718.png

 

Plain load image is the solution to release the external FLASH.

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