Content originally posted in LPCWare by bavarian on Fri Jul 10 02:17:05 MST 2015
Can you be more precise with regards to the measurement setup?
On the Keil board at least you have the jumper block J1 near to the loudspeaker which allows you to measure the current for 3.3V Analog/Regulator/IO.
However, I don't think that the numbers you see are absurd.
"Having no code" means the chip at least started up in a specific boot mode and hangs up there. Let's say it's starting in UART0 bootmode, then at the end of the bootcode it sits in a loop waiting for a '?' character. This is a well defined situation, the chip runs on 96MHz, M0 core is in reset and peripherals are enabled.
According to the diagrams in the data sheet this will give you a base floor of 40mA for the ARM and the bus system, on top of that you will get about 50mA for all the enabled peripherals. consume.
If you start with a bootmode which boots from memory but there is only random data in there, the result can be anywhere because you don't know what the ARM is doing with it.
If you drive the system to the maximum clock of 204MHz, then of course the power consumption will be higher. How high? what do you think?
The power consumption of a clocked piece of silicon goes linear with the clock. If you look for the M0 number in the table in the data sheet, 3.3mA @48MHz and 6.6mA @96 Mhz then you might get a feeling what it will be at 192MHz. Right, 13.2mA. The whole system will have double the power consumption if I double the clock.
What can be done to get it down:
[list]
[*] disable branch clock for peripherals which are not used
[*] decrease the input clock for peripherals (where it is possible) with a pre-divider
[*] supply the chip with a lower voltage if feasable
[/list]
Regards,
NXP Technical Support Team