Is it allowed to use SRAM, SDRAM and NOR Flash in the same board?

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Is it allowed to use SRAM, SDRAM and NOR Flash in the same board?

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amelendez
Contributor II

Is it possible to use in the same board SRAM, SDRAM and NOR Flash?.

If so, SDRAM and NOR Flash are 32 data bits width and SRAM 16 data bits width. Is this allowed?

Thanks

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bernhardfink
NXP Employee
NXP Employee

It is physically possible to connect all 3 memories to the MCU (for example with LPC18xx/43xx/546xx. There are a few things to consider:

  • The electrical load on the bus is in this case rather high, so a dense design and a good matching of the lines are required to get to highest possible performance
  • As some signals are shared between the memories, the bus performance will of course be lower than with an exclusive single memory
  • If there is no instruction in the user manual about equal bus widths, you can mix them. Each chip select should have its own setting.
  • The performance for execution of code is perfectly fine with a 16-bit memory
  • The performance for video data or other type of buffers is better with 32-bit data bus
  • I would remove the NOR flash and replace it with a QuadSPI flash. Your are more flexible with it, PCB design gets easier, you decrease the load on the EMC pins and you split the bus into two instances which decreases the number of bus conflicts

Regards,

bernhard

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jeremyzhou
NXP Employee
NXP Employee

Hi  amelendez,

Thank you for your interest in NXP Semiconductor products and 
the opportunity to serve you.
1) If so, SDRAM and NOR Flash are 32 data bits width and SRAM 16 data bits width. Is this allowed?
    I think it's impossible if these devices work with one MCU.
Hope it helps.
Have a great day,
TIC
 
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amelendez
Contributor II

Thanks, Jeremy.

But, it is possible to use with one MCU SRAM, SDRAM and parallel NOR Flash?.

(The SRAM will be only used for data backup, not for executing code)

Should they have the same data bus width?.

Then, I should decide to use all of them 16 bits width. How will this impact in the speed performace?. For example, working with video.

Best regards

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bernhardfink
NXP Employee
NXP Employee

It is physically possible to connect all 3 memories to the MCU (for example with LPC18xx/43xx/546xx. There are a few things to consider:

  • The electrical load on the bus is in this case rather high, so a dense design and a good matching of the lines are required to get to highest possible performance
  • As some signals are shared between the memories, the bus performance will of course be lower than with an exclusive single memory
  • If there is no instruction in the user manual about equal bus widths, you can mix them. Each chip select should have its own setting.
  • The performance for execution of code is perfectly fine with a 16-bit memory
  • The performance for video data or other type of buffers is better with 32-bit data bus
  • I would remove the NOR flash and replace it with a QuadSPI flash. Your are more flexible with it, PCB design gets easier, you decrease the load on the EMC pins and you split the bus into two instances which decreases the number of bus conflicts

Regards,

bernhard

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amelendez
Contributor II

Dear Bernhard.

Thanks again.

I have also read the AN11508.

Best regards:

Ángel Meléndez - amelendez@dibal.com - DIBAL, S.A. - Subdirector Técnico

/ Technical Assistant Manager - Tel.: (+34) 94 452 15 10, Ext.: 152

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amelendez
Contributor II

Thanks, Bernhard.

I am also going to place de QSPI.

Regards

Angel

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