As the title states, I need to connect a stereo CODEC in a 4-wire configuration. Mostly I see the UDA1380 CODEC being used but since this is obsolete I am going for the NAU8822LYG. This CODEC has 5 I2S pins:
MCLK (Master Clock)
BCLK (bit/data clock)
FS (Frame Sync / Word Select)
DACIN (Data In)
and
ADCOUT (Data Out)
(for now I have done the following:
I2S0_TX_MCLK -> MCLK
I2S0_TX_SCK -> BCLK
I2S0_TX_WS -> FS
I2S0_TX_SDA -> DACIN
I2S0RXSDA -> ADCOUT)
How would I connect this to the LPC4337? Furthermore, does anyone have example code to make this work? the UM10503 manual makes no sense to be how how go about this task. When they talk about the 4-wire setups I can not tell how I actualyl connect this to my CODEC.
Thanks in advance
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We had this topic already more than a month ago, right?
You're wiring looks good. You only need to set the registers correctly.
You need to consider the following: MCLK does not necessarily belong to the I2S interface. It is the system clock for the audio codec, according to the NAU8812 data sheet it can be any clock between 8MHz and 33MHz. So when the User Manual talks about 4-wire interface, then it's the 4 wires SCK / WS / RX_SDA / TX_SDA.
Having the MCLK on top in phase with these signals is maybe a good option, so providing it from the LPC4300 side is for sure the best solution. Using the audio PLL inside the LPC4300, you can already generate a suitable system clock for the codec and you don't need to use the fractional PLL from the NAU8812.
The UDA1380 could work with this MCLK as well, but has also the option to generate its own system clock with a PLL, based on the FrameSync clock input.
The question is now whether you need to realize input/output or only output. The so called 4-wire mode is the minimum setup for an RX/TX interface. If you also supply MCLK to the codec then this is the fifths wire.
Let's assume the LPC4300 is the I2S master and you use RX/TX in the 4-wire mode:
Hope this helps a little bit.
We had this topic already more than a month ago, right?
You're wiring looks good. You only need to set the registers correctly.
You need to consider the following: MCLK does not necessarily belong to the I2S interface. It is the system clock for the audio codec, according to the NAU8812 data sheet it can be any clock between 8MHz and 33MHz. So when the User Manual talks about 4-wire interface, then it's the 4 wires SCK / WS / RX_SDA / TX_SDA.
Having the MCLK on top in phase with these signals is maybe a good option, so providing it from the LPC4300 side is for sure the best solution. Using the audio PLL inside the LPC4300, you can already generate a suitable system clock for the codec and you don't need to use the fractional PLL from the NAU8812.
The UDA1380 could work with this MCLK as well, but has also the option to generate its own system clock with a PLL, based on the FrameSync clock input.
The question is now whether you need to realize input/output or only output. The so called 4-wire mode is the minimum setup for an RX/TX interface. If you also supply MCLK to the codec then this is the fifths wire.
Let's assume the LPC4300 is the I2S master and you use RX/TX in the 4-wire mode:
Hope this helps a little bit.