ADR assembler syntax

[lpcware]

Content originally posted in LPCWare by acelink1 on Thu Mar 06 02:03:51 MST 2014
Hi Guys, I have ran into a serious problem with ADR in assembler.

I've stored a few pictures in my LPC4357's flash bank A. I'm using the Cortex M4 CPU.
using .thumb mode too.

I have 10 pictures in flash mem all about 20k in size. In my assembler code I need to read picture 8's data so
I use this code:

   ADR.W R3, PICTURE8 // This should store the address of picture8 in R3 is that correct?

When I build my code the assembler tells me that it the wrong consonant. What does that mean? Syntax?

Can some one please show me how to read ANY address in flash memory with the ADR command or is their another
assembler command that I don't know of?

I even tried MOV.W R3, PICTURE8 thinking it would store the 32bit address in R3 and that didn't work either.

I have many years experience in Assembler 6502, 68000, ATMEL 8 & 32bit  MPU's but very little in ARM assembler.
and no C or C++.

So please  I really need a little help on thins one. All the rest of my code is working fine except the one I need most. ADR.

Thanks guys :)
Pete

[lpcware]

Content originally posted in LPCWare by TheFallGuy on Sun Mar 16 11:59:16 MST 2014
Can you show us some examples of your code? I think you are probably rather naive in your use of thumb assembler. It is very powerful with some great optimisation opportunities. I bet the experts on this forum can help you learn how to make best use of the assembler. For example, did you look at my suggestion of caching the address in an otherwise unused register? Load one, and then use forever...

Going to cortex-a will bring a whole new set of challenges...

[lpcware]

Content originally posted in LPCWare by starblue on Sun Mar 16 09:25:10 MST 2014
What exactly are you trying to do?

Are you trying to bit-bang VGA signals?

If yes you should really take a look at SGPIO. The shift registers could give you some slack for preparing the data.

It would help if you could describe the signals you want to generate (how many/which, timing).

I don't think it is a good idea to do cycle counting on a Cortex-A. I have not looked closely, but I'd guess that the Cortex A will have even more pipelining/caching and whatnot for improving speed, which will make the timing faster on average but less predictable.

[lpcware]

Content originally posted in LPCWare by acelink1 on Sun Mar 16 03:36:41 MST 2014
@ TheFallGuy. Say I wanted to load R0 with a 32bit number like this:

  MOVW R0, 0xFFFFFFFF  //1 cycle

The assembler will not allow this syntax, so Instead I have to write it like this:

  MOVW R0, 0xFFFF   // 1 cycle
  MOVT R0, 0xFFFF    // 1 cycle. Both = 2 cycles

When drawing to a VGA screen timing is criticle and even if your timing is out by 1 cycle the screen will move or jitter.

This is why I wanted to use the 1 cycle 32bit syntax but as you said, Thumb is 16bit code and you have to break the address down in to 2.
I totally understand this. It's like an 8bit processor trying to read memory addresses above 256 Bytes.
You must use 2 bytes like this: LO+256*HI=address.

;External Sram memory address = 1536
;8-BIT 6502 ASSEMBLER
  LDA #0
  STA 203
  LDA #6
  STA 204
  LDY #10
  LDA (203),Y   ; LOAD A  WITH MEM ADDRESS 1536 + 10
  STA 40000,Y ; POKE TO SCREEN MEMORY ADDRESS +10

I could use the 2 cycle method but the MCU would have to be running at 400Mhz or more for what I need to do with my project.

I probably need to look into the Larger Cortex A chips I've heard so much about but not yet researched them.
I will when I get to work on Monday.

Thanks TheFallGuy
Pete :)

[lpcware]

Content originally posted in LPCWare by TheFallGuy on Fri Mar 07 02:29:25 MST 2014
Why do you think you need a full 32-bit (ARM) instruction set? What is it about your application that makes Thumb unsuitable? The 'restrictions' of the Thumb instruction set are tiny, but the advantages are many - Search for "ARM vs Thumb" and you will find lots of reasons why (in a comparable system) Thumb is often quicker than ARM.

Also, have you looked at DMA if you are moving a lot of data about?

[lpcware]

Content originally posted in LPCWare by starblue on Fri Mar 07 02:08:57 MST 2014
That's a pity.

Have you checked all the hardware units of the LPC4357 whether they can be used (LCD driver, SGPIO)?

I don't think you will find a processor that is much better.  The bigger Cortex A are faster, but less good at real time stuff.

Maybe you need an FPGA?

[lpcware]

Content originally posted in LPCWare by acelink1 on Thu Mar 06 16:11:49 MST 2014
Thanks guys, I really thought the Cortex M4 was a true ARM 32bit processor but I find it's a 32bit processor with 16bit limitations. I need a true 32bit ARM processor for my present project and future projects.

Does LPC have any microcontrollers with true 32bit ARM instruction set, a large flash memory and at least 200Mhz+
and in LQFP Package?

Looks like it's more research time :(

Oh and thanks guys for your support. Your guys are the best !

Pete :)

[lpcware]

Content originally posted in LPCWare by TheFallGuy on Thu Mar 06 04:31:14 MST 2014
Welcome to Thumb!

Thumb is essentially a 16-bit instruction set (with some exceptions) and so the size of constants is restricted to a few bits. You really need to read about and understand the Cortex-M architecture.

You could always cache the address (yourself) in an unused register.

Compilers are very very good at sorting this out for you...

[lpcware]

Content originally posted in LPCWare by starblue on Thu Mar 06 04:14:09 MST 2014
Because the size of constants is severely limited, i.e. in general it won't fit in the instruction.

If the assembler knows that it fits it will use MOV for the pseudo instruction.

[lpcware]

Content originally posted in LPCWare by acelink1 on Thu Mar 06 04:10:32 MST 2014
Hi Guys, LDR stores it's addresses in a table -4k or + 4k from the PC LDR address and then stores the picture address in the table.  Then it gets the picture address + offset and moves it in to R3 or whichever register your using.

Why does it have to store the address in a table first?  Why can't it just MOV.W R3, PICTURE_ADDRESS

When doing VGA generation this uses up so may unnecessary machine cycles and because of this I lose video
resolution. The M4 runs at 204Mhz which is absolutely fantastic but with all this unnecessary tables I lose
in precious machine cycles. 

Is their another way of reading flash memory without tables or am I stuck with it and their is no other Thumb-2 code?

Pete

[lpcware]

Content originally posted in LPCWare by starblue on Thu Mar 06 04:09:34 MST 2014

LDR R3,=PICTURE8

seems about right.

Why don't you read it up on page 124/125 in Yiu's book?

[lpcware]

Content originally posted in LPCWare by TheFallGuy on Thu Mar 06 03:27:17 MST 2014
LDR?

I suggest you get yourself a good book...

A good book is the Joseph Yiu's book - The Definitive Guide to the Cortex-M3 and Cortex-M4

[lpcware]

Content originally posted in LPCWare by starblue on Thu Mar 06 03:26:12 MST 2014
You probably want the LDR ARM pseudo-instruction.

[lpcware]

Content originally posted in LPCWare by acelink1 on Thu Mar 06 03:19:41 MST 2014
Hi TheFallGuy, which instruction do I use? 

I've tried ADR, I've tried MOV.W what else is there?

Pete

[lpcware]

Content originally posted in LPCWare by TheFallGuy on Thu Mar 06 03:14:51 MST 2014
Have you actually read (and understood) the description of the ADR command?
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0041c/Babcjaii.html

---

Quote:

expression is a program-relative or register-relative expressionthat evaluates to:
    - a non word-aligned address within 255 bytes
    - a word-aligned address within 1020 bytes.

---

ADR is not the instruction you want...