Every message frame sent is a broadcast to all other CAN controllers on the bus. Every CAN controller
that is enabled and configured to the bus bitrate, whether it actively receives messages or not, detects
and monitors all frames bit by bit. Each frame contains a CRC checksum over data and identifier and an
acknowledge “slot”, a bit which is transmitted as recessive. When a monitoring CAN controller gets to
the acknowledge slot it compares the calculated with the transmitted checksum to make sure they
match. If they match then the monitoring CAN controllers transmit a dominant bit in the slot. If there is
a mismatch, the monitoring CAN controller will transmit an “error frame”, six consecutive dominant bits
to indicate that all other CAN controllers on the bus should discard the frame. The sending CAN
controller observes the bus during the acknowledge slot. If it is recessive then it knows that there were
no receivers and it will resend the frame.
"FAQ contribution from Embedded Systems Academy, experts in CAN bus. For more information visit www.esacademy.com"
