Using the KSDK SPI transfer function, how do I continuity send data?

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Using the KSDK SPI transfer function, how do I continuity send data?

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thanhduong
Contributor II

Hi,

 

I apologize in advance as I am new to KDS and Freescale devices. I want to know how I would go about sending multiple bytes of data WITH the chip select saying low, when using the KSDK SPI library. I am using KSDK v1.3 and the frdm-kl25z board.

 

The device I am communicating to has commands larger than a byte. The chip select signifies whether it is a different command. From the KSDK library, there is a blocking transfer fuction called SPI_DRV_MasterTransferBlocking(). I know it takes a couple of parameters, i.e what instance of spi you are using, config setting, sending data, receiving data, number of bytes, and timeout.

 

The problem I am having with this function is when I want to send multiple bytes, I would increase the amount of data I will send and the number of bytes it is, but it would toggle each time it sends data. For an example:

 

SPI_DRV_MasterTransferBlocking(spi0_idx, &spio_masterconfig, {0x4A}, NULL, 1, 1000)

This function selects spi0 module, sets configuration to master (this could be NULL if configured already), sends data 0x4A, expects no data to be received, and the number of bytes it will send is 1. If sending takes longer than 1000 ms, it will timeout. The chip select is put low then data is clocked out. This occurs once because I am only sending 1 byte.

 

sendbuffer[0] = {0x4A}

sendbuffer[1] = {0x46}

 

SPI_DRV_MasterTransferBlocking(spi0_idx, &spio_masterconfig, sendbuffer, NULL, 2, 1000)

Similar to above, except I am sending 2 bytes, 0x4A and 0x46. What I want to happen is that, when sending 2 bytes of data, the chip select stays low until all bytes have completed. But what I see is that chip select is toggled for each send.

 

How would I gain control of the chip select to keep it low for the duration of the send command? Is it possible? Would I be better of not using the library and doing it myself?

 

Thank you in advance!

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1 Solution
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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello Thanh,

For the Kinetis L series, it have not the function of "Keep PCSn signals asserted between transfers.".

While for the Kinetis K series,  the SPI IP is DSPI, we can use the register of  SPI_PUSHR->CONT to configure

this function :

pastedImage_0.png

Hope it helps


Have a great day,
Alice

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello Thanh,

For the Kinetis L series, it have not the function of "Keep PCSn signals asserted between transfers.".

While for the Kinetis K series,  the SPI IP is DSPI, we can use the register of  SPI_PUSHR->CONT to configure

this function :

pastedImage_0.png

Hope it helps


Have a great day,
Alice

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

1,149 Views
thanhduong
Contributor II

Hi Alice,

Thank for replying.

This is the limitation of the KL series boards with the KSDK or the KL series board in general? If I were to not use the KSDK, would I then have access to the chip select to leave it low?

Thanks,

Thanh

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xiangjunrong
Contributor IV

Hi, Thanh,

The SPI module of Kl25 uses different SPI IP from that of Kinetis K family, the SPI of KL25 does not have the CONT bit in it's registers, but the SPI module of K family has as Alice said. You set the SPI in master mode, generally, the /SS pin is driven by the SPI master module, when transferring data, the /SS pin is driven to low logic automatically so that the slave spi device can be selected. During the interval of data transfer, /SS pin is driven to high automatically, this is a normal operation.

If you want that  /SS pin  is always driven to low, as you know that /ss pin is multiplexed with GPIO function, you can configure the /SS pin in GPIO mode, before transferring data, you can clear the /ss pin, then you can transfer the data one by one, after all data have been transferred, set the /ss pin, it is okay.

Hope it can help you.

BR

Xiangjun Rong

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thanhduong
Contributor II

Hi XiangJun,

The method you suggested sounds like something worth exploring.

What do you mean by GPIO mode for the SS pin? How would I go about setting the SS pin of the SPI module to being GPIO driven rather than the automatic way it usually behaves?

Thanks,

Thanh

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thanhduong
Contributor II

Nevermind. I think I understand; Rather than use the module's SS functionality, use a GPIO to drive the Chip select pin?

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