Hi,
KE1xF Reference manual says:
The timer channels operate on an asynchronous clock,which is independent from the register read/write access clock.Clock synchronization between the clock domains ensures normal operations.
I have two questions:
1.Will the clock synchronization impact on the ADC or DMA?
2.How long will the clock synchronization take?
Best regards,
Ning
Hi Ning,
There is a synchronizer diagram in Figure 41-91(KE1xFP00M168F0RM.pdf). It composed by 2 D flip-flop and has 2 clock source.
1. I think synchronizer would not impact on ADC or DMA.
2. If the async peripheral clock is slow than bus clock, it will take over 1 async clock to read back.
Regards,
Jing
Hi Jing,
Thanks.
I have a PDB->ADC->DMA module, it works well.
But if there is a LPIT periodic interrupt, PDB sequence error will happen.
The PDB as ADC hardware trigger, triggers ADC conversion periodically.
PDB's interval is a bit longer than ADC conversion time.
After some test, it seems that LPIT can impact the PDB->ADC->DMA module.
If i disenable the LPIT interrupt, the module works well.
So i have doubt that LPIT clock synchronization will block ADC or DMA.
Or Maybe during LPIT clock synchronization, DMA can't access the bus.
Thanks again.
Regards,
Ning