how to read s9keaz128 80-bit unique identification (ID) number?

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how to read s9keaz128 80-bit unique identification (ID) number?

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abdfare
Contributor I

per data sheet<https://www.nxp.com/docs/en/data-sheet/S9KEA128P80M48SF0.pdf> 1.6 Security and integrity modules

the cpu has 80-bit unique identification (ID) number, please anyone know how to read it from a software (not using debuger, ust software/application running on the cpu)?

 

I am not sure which board should post this question, thanks a lot for any help, thanks.

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

This is an example of EEPROM example based on IAR, you can add the above code in the main as a test.

Pls download "EEPROM emulation driver for KEA128 and KEA8"" from the link and add code in the example to read the unique ID.

 

https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/automotive-mcus/ul...

Hope it can help you

BR

XiangJun Rong

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abdfare
Contributor I

Hi XiangJun 

this is great, thx a lot for the help

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I suppose that you can use the following code to access the 80 bits unique  ID:

#include "SKEAZN84.h"

uint32_t uniArray[4];

int main()
{

uniArray[0]=SIM_UUIDL;
uniArray[1]=SIM_UUIDML;
uniArray[2]=SIM_UUIDMH;

 

...

}

Hope it can help you

BR

XiangJun Rong

 

This is the part of SIM address  in SKEAZN84.h:

#if 0
/** SIM - Peripheral register structure */
typedef struct SIM_MemMap {
uint32_t SRSID; /**< System Reset Status and ID Register, offset: 0x0 */
uint32_t SOPT; /**< System Options Register, offset: 0x4 */
uint32_t PINSEL; /**< Pin Selection Register, offset: 0x8 */
uint32_t SCGC; /**< System Clock Gating Control Register, offset: 0xC */
uint32_t UUIDL; /**< Universally Unique Identifier Low Register, offset: 0x10 */
uint32_t UUIDH; /**< Universally Unique Identifier Middle Low Register, offset: 0x14 */
uint32_t UUIDMH; /**< Universally Unique Identifier Middle High Register, offset: 0x18 */
uint32_t CLKDIV; /**< Clock Divider Register, offset: 0x1C */
} volatile *SIM_MemMapPtr;

/** Peripheral SIM base pointer */
#define SIM_BASE_PTR ((SIM_MemMapPtr)0x40048000u)
/** Array initializer of SIM peripheral base pointers */
#define SIM_BASE_PTRS { SIM_BASE_PTR }

/* SIM - Register accessors */
#define SIM_SRSID_REG(base) ((base)->SRSID)
#define SIM_SOPT_REG(base) ((base)->SOPT)
#define SIM_PINSEL_REG(base) ((base)->PINSEL)
#define SIM_SCGC_REG(base) ((base)->SCGC)
#define SIM_UUIDL_REG(base) ((base)->UUIDL)
#define SIM_UUIDH_REG(base) ((base)->UUIDH)
#define SIM_UUIDMH_REG(base) ((base)->UUIDMH)
#define SIM_CLKDIV_REG(base) ((base)->CLKDIV)

#define SIM_SRSID SIM_SRSID_REG(SIM_BASE_PTR)
#define SIM_SOPT SIM_SOPT_REG(SIM_BASE_PTR)
#define SIM_PINSEL SIM_PINSEL_REG(SIM_BASE_PTR)
#define SIM_SCGC SIM_SCGC_REG(SIM_BASE_PTR)
#define SIM_UUIDL SIM_UUIDL_REG(SIM_BASE_PTR)
#define SIM_UUIDML SIM_UUIDH_REG(SIM_BASE_PTR)
#define SIM_UUIDMH SIM_UUIDMH_REG(SIM_BASE_PTR)
#define SIM_CLKDIV SIM_CLKDIV_REG(SIM_BASE_PTR)

#endif

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434 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

This is an example of EEPROM example based on IAR, you can add the above code in the main as a test.

Pls download "EEPROM emulation driver for KEA128 and KEA8"" from the link and add code in the example to read the unique ID.

 

https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/automotive-mcus/ul...

Hope it can help you

BR

XiangJun Rong

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