Dear forum members,
i use a K60 ADC in 16bit differential mode with VREFH = 3,3V and VREFL = 0V. The DM-Input is connected to 1,65V (fix voltage) and the DP-Input to our Signal which goes from 0 to 3,3V.
Errata e3863 says: "DP-Input must be <3,1968V to avoid conversion errors".
So i think i have a problem with the input signal range.
Is exchanging DM and DP a possible workaround ? (then DP is fix 1,65V and DM goes from 0V up to 3,3V)
"e3863: ADC: In 16-bit differential mode, ADC may result in a conversion error when positive input is near upper rail reference voltage Errata"
"Workaround: To avoid a conversion error near positive full-scale in this mode, do not allow the input voltage on the plus-side of the differential pair (DPx) to exceed (VREFH*31/32)"
Thanks,
Mike
已解决! 转到解答。
Hi Mike,
Could you tell me the full name of your chip, and the maskset number?
I think it is not only the DP pin should below the (VREFH*31/32), but also the DM pin should below the (VREFH*31/32), because in our datasheet, when in 16 bit differential mode, the ADC input voltage should below (VREFH*31/32).
But I will create a project to verify it after you tell me the full name of your chip to see whether my thought is correct.
Of course, you still can verfiy it in you interest in it.
Waiting for your reply!
Best regards,
Jingjing
Hi Mike,
Could you tell me the full name of your chip, and the maskset number?
I think it is not only the DP pin should below the (VREFH*31/32), but also the DM pin should below the (VREFH*31/32), because in our datasheet, when in 16 bit differential mode, the ADC input voltage should below (VREFH*31/32).
But I will create a project to verify it after you tell me the full name of your chip to see whether my thought is correct.
Of course, you still can verfiy it in you interest in it.
Waiting for your reply!
Best regards,
Jingjing
Hi Jingjing,
thanks for pointing me to the maskset number.
The full name and maskset nuber of my chip: MK60DN512VLQ10 4N22D QCTCP1411F
I could not see any problems when the input voltage (DP pin) goes over (VREFH * 31/32).
When carefully comparing the erratas it turns out that it applies to 4N30, 2N22D and older but not to the version 2 mask 4N22D we are working with.
Hence, it is not by chance that it works fine with our (newer) processor. Sorry to alert you on this matter and thank you for your help.
King regards Mike
Hi Mike,
That's good to hear that the problem is not exist in your chip.
Errata 4N22D is really moved the ADC problem, I think the new chip already solved the problem.
If you still have question, please let me know!
Have a great day,
Jingjing
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